PROCESSOR-SDK-AM64X: how to configure shared memory between the PRU and the R5/A53 without sysconfig

Hello Anton,

To confirm:

1) What software is running on which core of the processor?

2) Are you just asking for how to view memory somewhere? Or are you asking something else, like how to reserve the memory for each core to make sure other cores do not overwrite the memory?

Regards,

Nick

hi Nick,

im running my own code on the PRU, using it as a SerDes.

the Cortex A core is running GEL scripts and the R5 core is running some example code from the SDK.

i need to share memory between them, the data i generate on the PRU should be accessible (readable) by all cores.

thanks

Hello Anton,

This response assumes that Linux is NOT running, and that R5 and PRU are the cores trying to share the memory.

If you need guidance on getting Linux to run WITHOUT letting Linux touch the PRU_ICSSG or shared memory regions, please reference these other threads by other members of your team:
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1166498/tmds64gpevm-device-tree-modification-for-ethernet-ports
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1131974/processor-sdk-am64x-loading-r5-fw-by-linux---soc-clock-issue

Ok, let's assume that you are just sharing memory between R5 and PRU cores 

Where is the shared memory?

1) Somewhere in DDR or SRAM: as far as I am aware, the R5 linker.cmd file does NOT need to be updated with the shared memory sections (assuming that this shared memory is not intended to include stuff like the data stack). However, if Linux is running on the A53, the memory needs to be reserved as discussed in the links above to keep Linux from overwriting it.

2) within the PRU internal memory: no need to reserve in Linux as long as the PRU_ICSSG is marked as "disabled" in the Linux devicetree.

3) within the R5 internal SRAM: make sure the memory region is not used for other things by the R5 linker.cmd file.

The PRU is able to read and write to any area of memory that isn't write protected. I assume the same thing applies to the R5.

Regards,

Nick

Hi Nick,

as you assumed the A core is not running Linux, its not running at all actually.

i managed to configure the PRU shared ram at 0x0001_0000 64k, but where do i see it in the R5 memory space? do i have to configure memory translation to see it from the R5? how do i configure that?