• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 99 subscribers
  • Views 297 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5706: Why both CS0 and CS4 became Active at the same time after Reset in the case of XIP memory boot

Hideaki Matsumoto
Genius 9130 points
Part Number: AM5706

Hi,

My customer has developed their PCB board with AM5706, but it can’t start up.
They’re setting the Sysboot as XIP memory booting from Flash ROM on CS0, but the Flash cannot be read, because CS4 which SRAM is connected to also became Low as Active at the same time. See the attached waveform.

Do you know why the both CS0 and CS4 became Low after Reset ? Could you give them any advice ?

 

Sysboot = 0b  1  00  0  01  00  10 0101
  Memory Preferred Booting
    0b10 0b0101         1st XIP    2nd SD    3rd USB
    0b01       SYS_CLK1 Speed : 20MHz
    0b0         Disable Wait-pin Monitoring for Read Access
    0b00       Non-Muxed device
    0b1         16-bit Bus width

Regards,
Hideaki

  • 0
    TI__Guru 50045 points

    Hi,

    Could you list the exact ball name on AM5706 probed for CS4 shown in your scope?

    If you are referring to "GPMC_CS4", is it probed from GPMC_BEN0 pin?

    Regards,
    Stanley

  • 0 in reply to Stanley Liu
    TI__Genius 9130 points

    Hi Stanley,

    Thanks for your reply. Yes, they're probing from GPMC_BEN0 pin for GPMC_CS4.

    This is urgent inquiry from the customer. It would be appreciated if we can receive an answer as soon as possible..

    Thanks and regards,
    Hideaki

  • 0 in reply to Hideaki Matsumoto
    TI__Guru 50045 points

    Hi,

    I am checking with HW team about this observation.

    Could you comment if GPMC_BEN0/CS4 pin has external pull-up? Does the GPMC_BEN0/CS4 stay HIGH after the initial period?

    If external pull-up is used, which power supply is connected to the pull-up?

    One possibility is the power supply for the pull-up goes thru some transition period during that time.

    Regards,
    Stanley 

  • +1 in reply to Stanley Liu
    TI__Guru 54422 points

    As we have discussed in internal email ... 

    The ROM bootloader is likely to be configuring that particular pin to function as GPMC_BEN0.  Can they check the state of the padconf register immediately after the ROM boot is done, before any uboot/application code executes:

     PADCONF register at offset 0x14D0.

    Thanks,

    Kyle