TDA4VM: what's possibale reason of I2C in Bus Busy status?

Hi,

Can you please share some more details of the issue:

1) Is this a consistent issue? Are you always seeing this issue at high temperature?
2) Is this issue seen on TI-EVM or this is on a custom board?

Regards,
Parth

Hello Path,

It is on the customer board

More details are attached as beblow:

1.During High Tempture durability test,

①We detected the abnormal current firstly. The current of a normal board should be more than 1.1A without any peripheral load, but this abnormal one is just 0.4~0.5A.

②We read some registers of TDA4, and the result is above. We find TDA4 shows WKUP_I2C0_SCL is busy, which is connected to PMIC_A(TPS65941213) and PMIC_B(TPS65941211) I2C.

③We test the wave form of this pair of I2C. It shows that CLK signal is always high and DATA signal is always low.

2.After High Tempture durability test,

①We try to reproduce this phenomenon without any changes. Restart the ECU, but it can start normally. More times are the same.

②We connect the I2C DATA signal to the ground by an external flying wire. This abnormal phenomenon appears again. And TDA4 I2C is stuck on Bus Busy status again.

Then I'm confused why I2C Bus Busy happen. Although we can reproduce by a HW short GND, it should not be the root cause from me. This abnormal board can recover just by a restart without HW changes. I would like to know whether some TDA4 processes are stuck, which leads to I2CDATA being pulled down and I2C being busy all the time.

Look forward to your suggestions. Thank you!

Best Regards

An

Hi, TI experts

Add some more test information.

When this abnormal phenomenon happens, we test the voltage drop on the I2C line. It shows that the voltage near PMIC is lower. So I think this data line is pulled down by the PMIC port. However, the reason is not clear currently.

3247.TDA4_PMIC I2C block.pdf

A guess from my side as below based on some test results.

We will take more actions on the red parts.

This reset should be an abnormal(sudden) reset. If a normal reset occurs, the PMIC and TDA4 should have information interaction to inform the event. As a sudden shut down occurs, PMIC I2C is sending data at that time and TDA4 get stuck.

The bus is considered to be busy after the START condition (BB = 1) and free after the STOP condition (BB=0).

A START condition is a high-to-low transition on the SDA line while SCL is high.

A STOP condition is a low-to-high transition on the SDA line while SCL is high.

If an abnormal reset is suspected, the CTRLMMR_WKUP_RESET_SRC_STAT register can be read to determine the source of the last device reset.

Closing ticket. Please open a new e2e if anything further. 

John