C6747 EDMA3

Bo,

   Where are the xmt and rcv buffers located in memory? On Chip -or- Off Chip?

Also - have you confirmed that the event is being generated in the EDMA3 Transfer Controller?

Also - did you confirm that the sections of the device you are using are powered up?

    Firstly, thanks for your reply. But I met some new problems.

Drew Abuan said:

   Where are the xmt and rcv buffers located in memory? On Chip -or- Off Chip?

 

   L2:      o = 11800000h   l = 00040000h

 The buffers located in the L2. I think it's On chip.

Drew Abuan said:

  did you confirm that the sections of the device you are using are powered up?

 

  I have checked the psc0Regs->MDSTAT[0](Module Status n Register ), which shows the edma3cc is enable. So I think it's powered up. And I also checked the edma3tc0 and edma3tc1. They are all powered up.

Drew Abuan said:

have you confirmed that the event is being generated in the EDMA3 Transfer Controller?

 I think this is the real problem. As you can see in the following pic. After I running the code, the psc0Regs changed its value. But the edma3ccRegs didn't change anything. This really make me confused. Can you give me some suggestions about this?

Bo Wang,

You will need to study the EDMA3 User's Guide for your DSP. It explains many details that you need to understand, such as all of the OPT fields, the IDX fields, and the result of LINK=0xFFFF.

If you prefer a video, in the Training section of TI.com, there is a training video set for the C6474. It is a different device but the EDMA3 is very similar. In particular, the EDMA3/QDMA/IDMA Module will apply to your current questions. You can find the complete video set at http://focus.ti.com/docs/training/catalog/events/event.jhtml?sku=OLT110002 .

Regards,
RandyP

If you need more help, please reply back. If this answers the question, please click  Verify Answer  , below.

Thanks for your help. I will read the EDMA3 User's Guide more careful. But I just wonder why the edma3ccRegs' values  are all zero, when I read them in the Watch Window.  Because in my code, I have set the EDMA3's register, such as the OPT fields.

The code of the EDMA3:

Uint32 i;
 
  edma3ccRegs->EESR |= (Uint32)0x0002;
  edma3ccRegs->DMAQNUM[0] =  (CSL_EDMA3CC_DMAQNUM_E1_Q0 << CSL_EDMA3CC_DMAQNUM_E1_SHIFT);
   /* Set source                                                               */
  edma3ccRegs->PARAMSET[1].SRC = (Uint32)&xmt;
  edma3ccRegs->PARAMSET[1].DST = (Uint32)&rcv;         // Set destination
  edma3ccRegs->PARAMSET[1].A_B_CNT = 0x000A0004;      //ACNT = 4Bytes BCNT = 10Bytes
  edma3ccRegs->PARAMSET[1].CCNT = (Uint32)0x01;
  edma3ccRegs->PARAMSET[1].SRC_DST_BIDX = (0x0004 << CSL_EDMA3CC_SRC_DST_BIDX_DSTBIDX_SHIFT)
                                        |(0x0004 << CSL_EDMA3CC_SRC_DST_BIDX_SRCBIDX_SHIFT);
  edma3ccRegs->PARAMSET[1].SRC_DST_CIDX = (Uint32)0x00;
  edma3ccRegs->PARAMSET[1].LINK_BCNTRLD = 0x0001FFFF;
  edma3ccRegs->PARAMSET[1].OPT = (CSL_EDMA3CC_OPT_TCINTEN_ENABLE << CSL_EDMA3CC_OPT_TCINTEN_SHIFT)
                               |(0x01 << CSL_EDMA3CC_OPT_TCC_SHIFT)
                               |(CSL_EDMA3CC_OPT_SYNCDIM_ASYNC << CSL_EDMA3CC_OPT_SYNCDIM_SHIFT);
   

   edma3ccRegs->EMCR = (Uint32) 0x0002;
   edma3ccRegs->SECR = (Uint32) 0x0002;
   edma3ccRegs->IESR =0x00;
   edma3ccRegs->ICR = (Uint32) 0xFFFFFFFF;

   for(i = 0;i < 10;i++)
   {
       
        edma3ccRegs->ESR |= (Uint32) 0x0002;

    }

Looking forward your reply~~~

Thanks for your reply. I followed your suggestions and installed the "quickStartOMAPL1x_rCSL-2.0-Setup.exe". The code about the EDMA3 really helped me a lot. But when I built them, I met some new problems. As you can see in the following pic, I think it maybe needs a .lib file. But I cannt find the lib in the "quickStartOMAPL1x_rCSL" document(the installed file). I have tried the rts64plus.lib and rts6740.lib, but they seem not suitable. So can you give me some tips to solve this problem?

Thanks for your great help~~~Good luck~~~