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pci access

albertburbea
Intellectual 330 points

hi everybody

i am using a dsp 6415t at 850 mhz, and writing from host to pci bus interface as pci slave.

I see that the pci interface issues a large number of retries, while writing block of around 32 bytes each in sequence.

Now, is it possible to give a "priority boost" to the pci interface over cpu or other dma channels? And if so, how?

Thansk a lot

Albert

  • 0
    TI__Mastermind 41665 points

    albertburbea said:
    Now, is it possible to give a "priority boost" to the pci interface over cpu or other dma channels? And if so, how?

    Certainly, I think you are looking for the TRCTL register in the PCI peripheral, this register is discussed in section 15.3.15 of SPRU581c, this register has a PRI bit field that determines the priority of transfers submitted by the PCI, similar to the priority settings you can apply to EDMA channels. The default is set to medium (0x2) so if you set this to high (0x1) or urgent (0x0) you may see different behavior.