Hi, TI
I have a question about Safety Mechanism PDMA7 "Software Monitoring of Hardware State". In the safety manual, it requires to monitor the debug register(PDMA_PSILCFG_REG_DEBUG_1
PDMA_PSILCFG_REG_DEBUG_2), but how can I judge that PDMA state is incorrect through these debug registers?
Could you give me an example?
Thank you!
Zhihua
Hi Zhihua,
To implement “Software monitoring of hardware State”, the system integrator is expected to readback the PDMA_PSILCFG_TX_DEBUG_1 Register, PDMA_PSILCFG_TX_DEBUG_2 Register, PDMA_PSILCFG_RX_DEBUG_1 Register and PDMA_PSILCFG_RX_DEBUG_2 Register. Please refer Section 10.3.1.4.4 and 10.3.1.4.5 of the TDA4VM TRM for further details.
As mentioned in the device TRM these registers are not memory mapped and are accessed indirectly via CFG_PROXY modules in NAVSS. TRM has a separate chapter on PSIL-S (10.2.8 Packet Streaming Interface Link (PSI-L) ) which has called out the CFG Proxy MMRs to allow SW to access these registers which are visible over PSIL.
Assuming software has properly setup the Channel Destination Thread Mapping register in that DMA controller then those registers would be mapped to the TX Channel X Real-time Remote Peer Register 2 and TX Channel X Real-time Remote Peer Register 3. Any PSIL register in the 0x400 – 0x40F are mapped to these registers in the DMA controller talking to the PDMA.
Any of the PSIL registers that are at offset 0x400 to 0x40F can be accessed by the remote peer register. If the intent is to poll the state bits for safety then the simplest method would just be to poll the Remote Peer Register 2 for the PDMA_PSILCFG_TX_DEBUG1 and Remote Peer Register 3 for the PDMA_PSILCFG_TX_DEBUG2 register. This would be in the TX Real Time Configuration Channel Region for the UDMA for the channel that is using the PDMA. The same approach can be applied to the RX channels as well.
Regards,
kb
Hi，KB
Thanks for very detail explain.
My user manual doesn't have the registers you mentioned, it doesn't have the section 10.3.1.4.4 and 10.3.1.4.5 neither. But I guess the methodology is same. I have register PDMA_PSILCFG_REG_DEBUG_1 and register PDMA_PSILCFG_REG_DEBUG_2.
As you said I want to poll the state for safety, I means how can I know the current PDMA status is incorrect through the information provided by these registers? For example, the STATE field in register PDMA_PSILCFG_REG_DEBUG_2 is Tx and Rx, Then which infor. can be used to be compared with the STATE field, so that I can judge current PDMA state is incorrect?
Thank you!
Zhihua
