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C6455 SRIO peripheral and RapidIO 1.2 compliance/missing registers?

I see that version 1.2 of the RapidIO interconnect specification provides for several registers that the C6455 does not appear to have.  Note below information on the Mailbox CSR and Doorbell CSR copied directly from section 4.4 of the RapidIO Trade Organization interconnect spec, Rev. 1.2, dated 6/2002

4.4 Command and Status Registers (CSRs)

4.4.1 Mailbox CSR

(Offset 0x40 Word 0)

 

4.4.2 Doorbell CSR

(Offset 0x40 Word 1)

 

The C6455 SRIO peripheral has reserved space at these locations and thus appears to be non-compliant.  Can someone confirm whether these registers are indeed implemented, and if not then is there a document available somewhere which enumerates the entirety of C6455 SRIO peripheral issues in the context of the RapidIO 1.2 spec

My prior understanding was that the C6455 SRIO peripheral was indeed 1.2 compliant...

Thanks for all info...

Marc

  • Marc,

     

    These registers were obsoleted by the RapidIO Technical Working Group.  I tried to look on the RapidIO website to find out exactly when, but I didn't have any luck.  They are removed in rev1.3 of the spec.  These registers served little purpose and did not need to be examined before actually sending a message or doorbell because the protocol itself handled the situations described with "Done", "Error", or "Retry" responses. 

     

    Our devices are v1.3 compliant with the following exceptions/errata:

    - Showing 04-02-00002.001 - NOT SUPPORTED (additional register bit for 8b vs 16b port-write deviceID)

    - Showing 04-09-00019.004 (not in member's library) - 1x4x Initialization SM NOT SUPPORTED (PHYSICAL Layer)

    - Showing 04-08-00013.002 - enumeration boundary CSR bit (not in member's library) - NOT SUPPORTED

    - Showing 04-09-00022.002 - clear unacked packets bit (not in member's library) - NOT SUPPORTED

    - 4x/1x port downgrade to 1x port does not transmit on both lane 0 & 2

     

     

    Regards,

    Travis