I see that version 1.2 of the RapidIO interconnect specification provides for several registers that the C6455 does not appear to have. Note below information on the Mailbox CSR and Doorbell CSR copied directly from section 4.4 of the RapidIO Trade Organization interconnect spec, Rev. 1.2, dated 6/2002
4.4 Command and Status Registers (CSRs)
4.4.1 Mailbox CSR
(Offset 0x40 Word 0)
4.4.2 Doorbell CSR
(Offset 0x40 Word 1)
The C6455 SRIO peripheral has reserved space at these locations and thus appears to be non-compliant. Can someone confirm whether these registers are indeed implemented, and if not then is there a document available somewhere which enumerates the entirety of C6455 SRIO peripheral issues in the context of the RapidIO 1.2 spec
My prior understanding was that the C6455 SRIO peripheral was indeed 1.2 compliant...
Thanks for all info...
Marc