Code Composer Studio v4 Beta available

Media:CCSv4UpgradePitch.pdf && Quick Tips && Debug Server Scripting = "The page cannot be found" [*-)]

Right versions:

Media:CCSv4UpgradePitch.pdf

Quick Tips

Debug Server Scripting

Use absolute path in links [:D]

Thanks Timur.  I had just copied and pasted from the mediawiki not realizing that it was a relative link!

John

Hi:

I tried sending to the suggested address for the CCS4 Beta support team but DAEMON just bounced the e-mail so I do not know what to do next.  Help is appreciated, even if just a correct e-mail address that goes somewhere.

I'm doing the tutorials on program setup and have gotten to the point of loading the program to the target. 

I'm using Windows XP on a new ASUS laptop.  The XP is fully updated.

I have not had any previous beta of CCS4 in my computer, just limited CCS3.3.  I didn't remove 3.3 in any way.

I'm connected to a TMDXDOCK28027  Piccolo A experimenters kit.  I seemed to connect ok to the computer as it was recognized and the CCS 4 (is CCS3.3 platinum CCS4?) seems to run ok. 

I downloaded CCS4 from the TI website, beta. Download went smoothly.

That's what I've got running.  Everything has gone ok to this point, the tutorial is good and reasonable and I was doing fine until this hit so it will be interesting to see what has gone wrong.

I seem to have done everything right so far and the Project View looks as it does in the example.

When I build the program I get:

1error  one or more sections of your program falls into a memory region that is not writeable---

Loading Program requester says:

...cfs/volume1/volume1/Debug/volume1.out

  loading sections

  a window here stays empty.  Below it appears this:

  .reset 0 of 4   at 0x3fffc0

An error window pops up with:

Data verification failed at address 0x3fffc0

Please verify target mem and mem map.

Since I'm doing a tutorial to learn how to use this setup I don't yet know how to verify my target mem so I don't know what to do to solve the problem.  I'm not sure I would understand the result if verifying it didn't clearly tell me what I might do to correct the situation when it tells me what's wrong.

I've checked the forum and your wiki and do not see an answer anywhere.

I haven't tried to migrate any previous programs or any other activity besides just starting the tutorial.

Thanks for your help

Larry Grant

Sorry it doesn't look like any replies from my blackberry made it through.

I tested out the support email list with a number of different accounts (company, gmail...) and it seems to be working fine. ccsv4beta@list.ti.com

A data verification error occurs when CCS writes a block of memory during program load and then reads it back again to make sure it was written correctly and then finds that they don't match.  My guess would be that the linker command file that the project is using doesn't match the device.  Which linker command file did you use?  Are you using the volume1 tutorial from CCSv3.3?

John

I'm working on a project on the DSK6713 (spectrum digital) and I'd like to try this new version of CCS. Therefore I have two questions:

1. Does this new version influence an existing CCS v3.3 installation (and its associated components (CGT, DSP/BIOS, USB emulation driver, ...)) in any way?
   I'd like to try this new version but I have to be sure that I can contiue my current project on CCS v3.3 without any problems.
2. Is the DSK6713 already supported (board specific settings, drivers, ...)?

Robert

Robert,

4.0 and 3.3 can coexist.  4.0 doesn't rely on the windows registry to manage its components so it won't stomp on 3.3.  If your USB emulator is from Spectrum or Blackhawk the drivers will be installed automatically.

I haven't used C6713 with v4 but I looked and there is a "board file" for it.  This is something that you use in the new setup program where you choose your emulator and then either teh device or board you are using and I see a board file for the C6713DSK.

Regards,

John

what version of the compiler tools are used with 4.0?

I am using code from spra686 and ccs 3.3/compler v6.1.5 and the code is not nearly as tight as in the application report with the same complier switches.

I suspect given the date the compiler used was v5.x.

CCSv4 includes the 6.1.8 C6000 compiler today.  Our next beta will have 6.1.9.  Essentially we are including the latest 6.1.x compiler.  However for any given project you can configure it to use a different version of the compiler.  If you have a project and want to change it to use the 5.1.x compiler you just need to tell CCS where that compiler is and then you can change projects to use that compiler.  Each project specifies which compiler and DSP/BIOS to use.

The mediawiki site has more detailed information on how to do this.

http://tiexpressdsp.com/index.php?title=Compiler_Installation_and_Selection

Regards,

John

I can confirm that there is a DSK6713 driver and that it works with the on-board emulation. Also, for grins I used the wizard to port over one of the BSL examples 'led' (and the BSL library itself); however, I am in the middle of a strange build error I am working on resolving. For reference here is the build script I see with v4 as some of you may run into this issue:

**** Clean-only build of configuration Debug for project led ****

Build complete for project led

 

**** Build of configuration Debug for project led ****

 

C:\Program Files\Texas Instruments\ccsv4\utils\gmake\gmake -k all

'Building file: ../led.c'

'Invoking: C6000 Compiler v6.1'

"C:/Program Files/Texas Instruments/ccsv4/tools/compiler/c6000/bin/cl6x" -mv6700 -g --fp_mode=strict --define="_DEBUG" --define="CHIP_6713" --include_path="C:/Program Files/Texas Instruments/ccsv4/tools/compiler/c6000/include" --include_path="C:\CCStudio_v3.3\C6000\csl\include\" --include_path="C:/Documents and Settings/a0270584/My Documents/workspace/led/Debug" --include_path="C:\Program Files\Texas Instruments\bios_5_40_00_06" --include_path=".." --include_path="C:/CCStudio_v3.3/c6000/dsk6713/include" --quiet --sat_reassoc=off --fp_reassoc=on --mem_model:const=data --mem_model:data=far_aggregates  --preproc_with_compile --preproc_dependency="led.pp" "../led.c"

[and.]

Fatal error: could not open source file "and"

1 fatal error detected in the compilation of "and".

Compilation terminated.

 

>> Compilation failure

C:\Program Files\Texas Instruments\ccsv4\utils\gmake\gmake: *** [led.obj] Error 1

C:\Program Files\Texas Instruments\ccsv4\utils\gmake\gmake: Target `all' not remade because of errors.

Build complete for project led

Hi Tim,

I suspect some build settings were not set properly by the wizard during the import. I don't have the led example but I was able to import and build the BSL blink example for C6711 successfully with CCSv4 (just had to add the include paths to CSL headers and library). Could you zip and attach the project folder for led so I can try generate the error?

Thanks

ki

Ki,

We were able to find the issue in the build options. One of the include search paths was set to "C:\CCStudio_v3.3\C6000\csl\include\" but after removing the trailing backslash everything builds OK.

I'm attaching the project. You may need the CSL and BSL headers to build if you do not already have them, but the error should show up without them.

Greg,

Was there are particular piece of code from spra686 that is not working as well with the 6.1.x compiler?

John

Thanks for the response.

This may be operator error or lack of understanding but if you go to the application note on pg 30 they imply that the inner loop in the function syn_acc_c there are 8 clk cycles required to execute this inner loop.   When I compile the same code using complier 6.1.4 I get something that looks like 16 clks to me.

Here is the asm snippet in question

;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop source line                 : 436
;*      Loop opening brace source line   : 437
;*      Loop closing brace source line   : 518
;*      Known Minimum Trip Count         : 1                   
;*      Known Max Trip Count Factor      : 1
;*      Loop Carried Dependency Bound(^) : 7
;*      Unpartitioned Resource Bound     : 8
;*      Partitioned Resource Bound(*)    : 8
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     4        4    
;*      .S units                     0        0    
;*      .D units                     4        4    
;*      .M units                     8*       8*   
;*      .X cross paths               0        8*   
;*      .T address paths             4        4    
;*      Long read paths              0        0    
;*      Long write paths             0        0    
;*      Logical  ops (.LS)           4        4     (.L or .S unit)
;*      Addition ops (.LSD)         11       10     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             4        4    
;*      Bound(.L .S .D .LS .LSD)     8*       8*   
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 8  Schedule found with 2 iterations in parallel
;*      Done
;*
;*      Loop will be splooped
;*      Collapsed epilog stages       : 0
;*      Collapsed prolog stages       : 0
;*      Minimum required memory pad   : 0 bytes
;*
;*      Minimum safe trip count       : 1
;*----------------------------------------------------------------------------*
$C$L1:    ; PIPED LOOP PROLOG
    .dwpsn    file "ReedSolomon.c",line 436,column 0,is_stmt

           SPLOOPD 8       ;16               ; (P)
||         ADD     .L2X    1,A17,B21         ; |367|
||         ADD     .L1X    1,B5,A18          ; |369|
||         MVC     .S2     B1,ILC

    .dwpsn    file "ReedSolomon.c",line 445,column 3,is_stmt
;----------------------------------------------------------------------
; 446 | if (diff) diff --;                                                    
; 447 | byteval2 = *byte_ioff2ptr++;                                          
; 448 | byteval4 = *byte_ioff4ptr++;                                          
; 449 | byteval6 = *byte_ioff6ptr++;                                          
; 450 | if (st) byteval1 = *byte_ioff1ptr++;                                  
; 451 | if (st) byteval3 = *byte_ioff3ptr++;                                  
; 452 | if (st) byteval5 = *byte_ioff5ptr++;                                  
; 453 | if (st) byteval7 = *byte_ioff7ptr++;                                  
; 454 | temp = _pack2(byteval, byteval);                                      
; 455 | byte_i1 = byte_i0 = _packl4(temp,temp);                               
; 456 | temp = _pack2(byteval1,byteval1);                                     
; 457 | if (st) byte_i1 = _packl4(temp,temp);                                 
; 458 | temp = _pack2(byteval2, byteval2);                                    
; 459 | byte_i3 = byte_i2 = _packl4(temp,temp);                               
; 460 | temp = _pack2(byteval3,byteval3);                                     
; 461 | if (st) byte_i3 = _packl4(temp,temp);                                 
; 462 | temp = _pack2(byteval4, byteval4);                                    
; 463 | byte_i5 = byte_i4 = _packl4(temp,temp);                               
; 464 | temp = _pack2(byteval5,byteval5);                                     
; 465 | if (st) byte_i5 = _packl4(temp,temp);                                 
; 466 | temp = _pack2(byteval6, byteval6);                                    
; 467 | byte_i7 = byte_i6 = _packl4(temp,temp);                               
; 468 | temp = _pack2(byteval7,byteval7);                                     
; 469 | if (st) byte_i7 = _packl4(temp,temp);                                 
; 478 | s1_w0 = _gmpy4(s1_w0, betaword0) ^ byte_i0;                           
; 479 | s2_w0 = _gmpy4(s2_w0, betaword0) ^ byte_i2;                           
; 480 | s3_w0 = _gmpy4(s3_w0, betaword0) ^ byte_i4;                           
; 481 | s4_w0 = _gmpy4(s4_w0, betaword0) ^ byte_i6;                           
; 490 | s1_w1 = _gmpy4(s1_w1, betaword1) ^ byte_i0;                           
; 491 | s2_w1 = _gmpy4(s2_w1, betaword1) ^ byte_i2;                           
; 492 | s3_w1 = _gmpy4(s3_w1, betaword1) ^ byte_i4;                           
; 493 | s4_w1 = _gmpy4(s4_w1, betaword1) ^ byte_i6;                           
; 502 | s1_w2 = _gmpy4(s1_w2, betaword2) ^ byte_i1;                           
; 503 | s2_w2 = _gmpy4(s2_w2, betaword2) ^ byte_i3;                           
; 504 | s3_w2 = _gmpy4(s3_w2, betaword2) ^ byte_i5;                           
; 505 | s4_w2 = _gmpy4(s4_w2, betaword2) ^ byte_i7;                           
; 514 | s1_w3 = _gmpy4(s1_w3, betaword3) ^ byte_i1;                           
; 515 | s2_w3 = _gmpy4(s2_w3, betaword3) ^ byte_i3;                           
; 516 | s3_w3 = _gmpy4(s3_w3, betaword3) ^ byte_i5;                           
; 517 | s4_w3 = _gmpy4(s4_w3, betaword3) ^ byte_i7;                           
;----------------------------------------------------------------------
;** --------------------------------------------------------------------------*
$C$L2:    ; PIPED LOOP KERNEL
$C$DW$L$_syn_acc_c$6$B:
    .dwpsn    file "ReedSolomon.c",line 437,column 0,is_stmt

           SPMASK          L1,L2
||         MV      .L2X    A16,B20
||         MV      .L1X    B17,A16
|| [ B0]   LDBU    .D2T2   *B23++,B20        ; |450| (P) <0,0>
|| [ B0]   LDBU    .D1T1   *A18++,A16        ; |452| (P) <0,0>

           SPMASK          L1,L2
||         MV      .L2X    A3,B19
||         MV      .L1X    B2,A17
|| [ B0]   LDBU    .D2T2   *B21++,B19        ; |451| (P) <0,1>
|| [ B0]   LDBU    .D1T1   *A20++,A17        ; |450| (P) <0,1>

           SPMASK          L2
||         MV      .L2X    A26,B5
||         LDBU    .D1T1   *A21++,A5         ; |447| (P) <0,2>

           SPMASK          L1,L2
||         MV      .L1X    B13,A22
||         MV      .L2X    A9,B17

           SPMASK          L1
||         MV      .L1X    B26,A3
||         LDBU    .D1T1   *A19++,A3         ; |449| (P) <0,4>
||         GMPY4   .M2X    B9,A24,B9         ; |492| (P) <0,4>
||         LDBU    .D2T2   *B22++,B4         ; |448| (P) <0,4>
||         GMPY4   .M1     A6,A24,A6         ; |493| (P) <0,4>

           PACK2   .S2     B20,B20,B6        ; |502| (P) <0,5>
||         PACK2   .L1     A16,A16,A6        ; |505| (P) <0,5>
||         GMPY4   .M1     A8,A25,A8         ; |479| (P) <0,5>
||         GMPY4   .M2X    B6,A25,B6         ; |480| (P) <0,5>

           PACK2   .L1     A17,A17,A8        ; |503| (P) <0,6>
||         GMPY4   .M1     A5,A23,A3         ; |503| (P) <0,6>
||         GMPY4   .M2X    B7,A22,B7         ; |516| (P) <0,6>

           SPMASK          D1
||         MV      .D1X    B18,A30
|| [!A0]   LDBU    .D2T2   *B24++,B8         ; |445| (P) <0,7>  ^
|| [ B0]   PACKL4  .L1     A6,A6,A26         ; |505| (P) <0,7>
||         GMPY4   .M1     A7,A24,A7         ; |491| (P) <0,7>
||         PACK2   .S1     A5,A5,A5          ; |479| (P) <0,7>
||         GMPY4   .M2X    B17,A23,B4        ; |504| (P) <0,7>

   [ B0]   PACKL4  .L2     B6,B6,B26         ; |502| <0,8>
||         GMPY4   .M2X    B4,A24,B18        ; |490| <0,8>
||         PACK2   .S2     B19,B19,B7        ; |504| <0,8>
|| [ B0]   PACKL4  .L1     A8,A8,A29         ; |503| <0,8>
||         GMPY4   .M1     A3,A22,A3         ; |517| <0,8>

           GMPY4   .M2X    B5,A25,B16        ; |478| <0,9>
|| [ B0]   PACKL4  .L2     B7,B7,B5          ; |504| <0,9>
||         GMPY4   .M1     A4,A23,A4         ; |505| <0,9>
||         PACKL4  .L1     A5,A5,A9          ; |479| <0,9>
||         PACK2   .S2     B4,B4,B4          ; |480| <0,9>
||         PACK2   .S1     A3,A3,A4          ; |481| <0,9>

           GMPY4   .M2X    B16,A22,B8        ; |514| <0,10>
||         GMPY4   .M1     A28,A22,A9        ; |515| <0,10>
|| [!B0]   MV      .S1     A9,A29            ; |503| <0,10>
||         PACKL4  .L2     B4,B4,B16         ; |480| <0,10>
||         PACKL4  .L1     A4,A4,A27         ; |481| <0,10>

           GMPY4   .M2X    B8,A23,B16        ; |502| <0,11>
||         GMPY4   .M1     A30,A25,A9        ; |481| <0,11>
||         XOR     .L1     A27,A6,A6         ; |493| <0,11>
|| [!B0]   MV      .S1     A27,A26           ; |505| <0,11>
||         XOR     .D1     A29,A3,A5         ; |503| <0,11>
||         XOR     .L2     B16,B6,B6         ; |480| <0,11>
||         XOR     .S2     B16,B9,B9         ; |492| <0,11>
|| [!B0]   MV      .D2     B16,B5            ; |504| <0,11>

           XOR     .S2     B5,B7,B7          ; |516| <0,12>
|| [!A0]   PACK2   .L2     B8,B8,B8          ; <0,12>  ^
||         XOR     .L1     A9,A8,A8          ; |479| <0,12>
||         XOR     .S1     A26,A3,A3         ; |517| <0,12>

           XOR     .D2     B5,B4,B17         ; |504| <0,13>
|| [!A0]   PACKL4  .L2     B8,B8,B25         ; <0,13>  ^
||         XOR     .S1     A26,A4,A4         ; |505| <0,13>
||         XOR     .D1     A9,A7,A7          ; |491| <0,13>

           XOR     .L2     B25,B18,B4        ; |490| <0,14>
|| [!B0]   MV      .S2     B25,B26           ; |502| <0,14>
||         XOR     .D2     B25,B16,B5        ; |478| <0,14>
|| [ A0]   SUB     .S1     A0,1,A0           ; |446| <0,14>  ^
||         XOR     .D1     A29,A9,A28        ; |515| <0,14>

    .dwpsn    file "ReedSolomon.c",line 518,column 0,is_stmt
;----------------------------------------------------------------------
; 524 | temp1w0         = _gmpy4(s1_w0, beta3word0);                          
; 525 | temp2w0         = _gmpy4(s2_w0, beta2word0);                          
;----------------------------------------------------------------------

           SPKERNEL 0,7
||         XOR     .L2     B26,B16,B8        ; |502| <0,15>
||         XOR     .S2     B26,B8,B16        ; |514| <0,15>
||         XOR     .D1     A27,A9,A30        ; |481| <0,15>

$C$DW$L$_syn_acc_c$6$E:
    .dwpsn    file "ReedSolomon.c",line 445,column 3,is_stmt
;** --------------------------------------------------------------------------*
$C$L3:    ; PIPED LOOP EPILOG

           MV      .D2X    A3,B26
||         MV      .L1X    B17,A9

This assembly comment ...

;*         ii = 8  Schedule found with 2 iterations in parallel

tells you it is an 8 cycle loop.  A better way to tell ... Build with -mw and look at the "Single Scheduled Iteration" that is added to those assembly comments.

Thanks and regards,

-George