I am using the EDMA3 for data transfer with McASP port. But i am not able to access the EDMA configurations ( content of CC and TC memory are 0xBAD0BAD0, from 0x49000000 from A8). I believe the clock for EDMA CC and TC are not enabled.
How do i enable the TI4818 EDMA clocks? The code below does not seem to be enough:
#define CM_DEFAULT_L3_FAST+CLKSTCTRL 0x48180508
#define CM_DEFAULT_DMM_CLKCTRL 0x48180528
WR_MEM_32(CM_DEFAULT_L3_FAST_CLKSTCTRL, 0x2); /*Enable the Power Domain Transition of L3 Fast Domain Peripheral*/
WR_MEM_32(CM_DEFAULT_DMM_CLKCTRL, 0x2); /*Enable EMIF1 Clock*/
Thanks in advance,
Philip
