[FAQ] AM623: clock outputs

The AM62x device is able to source a 25MHz clock via the CLKOUT0 signal function that is multiplex to the EXT_REFCLK1 pin.  However, software will need to configure the appropriate PLL, internal multiplexing, and the respective PADCONFIG register before this clock will be sourced from the pin. Most RGMII PHYS require a valid clock before reset is released, so you will need design your system to hold the RGMII PHY in reset until the clock is valid.

The AM62x device will automatically begin sourcing the device reference clock (MCU_OSC0) to the WKUP_CLKOUT0 pin as soon as the device is released from reset (MCU_PORz 0->1).

I'm not sure if it is possible to generate a 24.576MHz or 22.5792MHz from the AM62x device. I sent an email to our clocking and McASP experts asking if this is possible. I will need to let you know the answer once they reply.

It is good that you plan to use a 25 MHz crystal on MCU_OSC0 since this is the only reference clock frequency supported by this device.

I'm not able to address any questions related to your specific software implementation. You need will need to confirm your software configures the device such that it achieves your system function and performance goals.

Note: TI does not define performance of the AM62x clock outputs because clock performance is influenced by many variables unique to each system implementation. You should plan to validate any clock output is able to meet the appropriate level of performance required by the attached device using your actual system design while operating across all operating conditions.

Regards,
Paul 

hi Paul,

thx for your feedback. Please note that this is for a SOM business we have recently won with Brian Berner. 

We need to be detailed/comprehensive with our answers.

Regarding your earlier comment here is their feedback/follow-up quesstion:

regarding the questions on the clocks output you mention that there are software dependencies, in our case we are going to use Linux (either from your sources, e.g. git.ti.com) or the upstream one (kernel.org).

 We need to know if what we do plan to do is possible with the sofware stack already developed by TI or we would need to develop drivers on our own. Is this the kind of information we can expect from you or we would have to check somewhere else? For example regaring the audio_ext_refclk I noticed a question that pretty much overlap with our need on e2e.ti.com (https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp) - not answered yet.

yes please assign to software team if you can do that?

Hi Isee,

Please refer this thread: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp where I have details on how Audio_EXT_REFCLK[0-1] can be configured from one of the AUDIO_REFCLK select inputs. 

Also, I have referenced the dtsi file and driver code location under sound/soc/ti/davinci-mcasp.c.

Is there anything else you would want to know?

Best Regards,

Suren

I would say it is 95% clear. From what I understood this clock could be used only as 25MHz in practice. However we cannot use a 25MHz clock to our audio codec because of limitation on the divider/pll on the codec will not allow us to generate a proper 48kHz audio signal. This mean we will have to use an external oscillator, likewise you already do on the AM62x SK.

 Correct?

For 48 kHz, the oscillator frequency would need to be 24 MHz. The closest frequency achievable with a 25 MHz oscillator is 0.000000016% faster than 48 kHz. If this is an acceptable error for the application, then they can use 25MHz, which is what AM62x supports. If not, they need to use a codec that can source the bit clock to AM62x if 24.576Mhz is required.

Hope this helps.

Best Regards,

Suren