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AIS file section fill command.

Other Parts Discussed in Thread: TMS320C6747

Referring to sprabb1b.pdf "Using the TMS320C6747/45/43 Bootloader", this documents the AIS format, and the functions supported by the ROM of these devices.

I am writing an AIS generator that will use the "Section Fill command".

4.2 Section Fill Command (0x5853590A)

[addr][size][type][pattern]

However, the encoding of the 'type' field is not specified.

Also how the pattern field is used when the type is not 32 bits.

Can anyone tell me the details.

Alternatively, a link to the ROM bootloader source code would allow me to find the same info indirectly.

thanks

 

  • We do not plan on releasing the ROM bootloader code.

    "This command takes four arguments: address and size of the section to be filled, the type of memory access (8/16/32-bit), and the pattern that will fill the memory."

    I believe that the type is either '8', '16' or '32' in the appropriate hex conversion. I've looped in the expert to confirm or correct.

  • This should be programmed similarly to the Length field of Table 2. We will update the app note to make this more clear.

    Specifically: 0=8-bit, 1=16-bit 2=32-bit.

    Jeff

  • Thanks Jeff, you have answered the first half of my question.

    The other half is how the 32 bit fill value is used, particularly when the size field does not specify 32 bits, or the address or length fields are not multiples of 32 bits.Is the fill value masked, or just copied in chunks specified by the size field.

    Are there constraints relating addr, size and type (e.g when type is 32 bit, addr and size must be multiple of 32 bit?)

    Note this won't affect me directly, because I only plan to used 32 bit zero fill at this point, but if you are going to update the appnote, might as well provide full details.

     

    On the subject of the appnote, this looks wrong to me in Appendix C

    if (remain = size % 4)
    {
    word = *dataPtr;
    // Pad incomplete word with zeros to make it complete
    word = (word << remain * 8) >> remain * 8;

    ? should be using (4 - remain) in the shifts ?

     

  • The data is copied in chunks specified by the size field. There is no masking done. Here is an example of how it does the 8 bit fill:

     case PATTERN_TYPE_08_BIT:
                for (i = 0; i < Size; i+=1)
                  *((Uint8 *) (Address + i))  = (Uint8) Pattern;

    Are you referring to "sprab41c"? If so I dont see any reference to the code you wrote. Appendix C is the CRC Computation Algorithm.

    Jeff

  • Thanks Jeff,

    that answers my question.  I am going to start a new thread with question/comment about the CRC calculation, rather than mix it up with this thread.

    --

    Eliot

  • Hi guys,

    I'm still a bit unsure about the size field. Eliot's code produces section fills with the size field always being the number of bytes, but your explanation above seems to suggest it should be the number of chunks (ie for 32-bit pattern and a size of 4 would write 16 bytes).

    I am using a different processor (C6748, d800k004), and I've modified the CRC algorithm to work (and verified it against AIS files produced using AISgen 1.9), but AISgen doesn't seem to generate section fills, and the AISgen code looks like it wouldn't generate a CRC for section fills anyway, so I can't verify the section fills.

    This isn't *too* important as I am using the files generated with eliot's script to boot an application with my second level bootloader, but I just want to be sure that it is implemented correctly.

  • Hi all,

    Unfortunately this last question was never answered.
    I'm writing a script that appends commands to an AIS fill generated by AISGen, to initialize some global variables in my code.
    I was also wondering whether a size 4, 32-bit section fill would write 4 or 16 bytes. And a size 3 section fill? Will it write 3, 4 or 12 bytes?
    Thanks in advance.

    Regards,

    Remco Poelstra