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ECLKOUT DSK6416

Hello Everyone,

 

I am trying to do a Peripheral Device Transfer ( a PDT write  by programming the EDMA and EMIFA registers ) from a FIFO on a Virtex-5 FPGA to a DSK6416 SDRAM.

 

My question is, when I look at the EMIF out clock ( ECLKOUT) on the scope it DOES NOT look like a square wave but rather like a sinusoidal wave with a frequency of 125 MHz and amplitude is 1.6 V.

Isn't ECLKOUT supposed to look like a square wave. I also grounded pin 75 of J3 in the Peripheral Expansion Connector to GND.

 

Regards,

 

Varun

  • I have also attached a picture of my DSP connected to the Virtex-5 FPGA. Another question is how do you reduce the EMIF clock rate to say like 10 or 12 MHz. I don't find any

    ECLKIN pin on the DSK6416  EMIF to externally clock it.

     

    Thanks,