TDA4VM: Change console from main_uart8 to main_uart3 failed.

shaofeng huang

Part Number: TDA4VM

change console from main_uart8 to main_uart3 failed.

SOC: TDA4AL

SDK Version: ti-processor-sdk-linux-j721s2-evm-08_04_00_13

error log：

U-Boot SPL 2021.01-00005-g97e01d82d5-dirty (Dec 15 2022 - 22:31:09 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.4.1--v08.04.01 (Jolly Jellyfi')
SPL initial stack usage: 13472 bytes
Trying to boot from MMC2
Starting ATF on ARM64 core...

NOTICE: BL31: v2.6(release):v2.7-rc0-dirty
NOTICE: BL31: Built : 22:24:29, Dec 15 2022

ERROR: Unhandled External Abort received on 0x80000000 from S-EL1
ERROR: exception reason=0 syndrome=0xbf000000
Unhandled Exception from EL1
x0 = 0x000000009b680000
x1 = 0x0000000000000000
x2 = 0x000000009b7fffff
x3 = 0x000000009e85ecc8
x4 = 0x0000000002800000
x5 = 0x000000000000001f
x6 = 0x000000000288001f
x7 = 0x0000000000200000
x8 = 0x000000009e895a48
x9 = 0x000000009e87bff0
x10 = 0x0000000000000000
x11 = 0x0000000000000000
x12 = 0x000000009e8959b8
x13 = 0x000000000000000a
x14 = 0x00000000ffffffff
x15 = 0x0000000000000020
x16 = 0x000000009e80fe48
x17 = 0x0000000000000000
x18 = 0x0000000000000000
x19 = 0x000000009e895b30
x20 = 0x0000000000000001
x21 = 0x000000009e86a71c
x22 = 0x0000000000000000
x23 = 0x0000000000000007
x24 = 0x000000009e895c40
x25 = 0x0000000000000000
x26 = 0x0000000000000006
x27 = 0x0000000000000001
x28 = 0x0000000000000100
x29 = 0x000000009e895a50
x30 = 0x000000009e80fe5c
scr_el3 = 0x0000000000000e38
sctlr_el3 = 0x0000000030cd183f
cptr_el3 = 0x0000000000000000
tcr_el3 = 0x0000000080803520
daif = 0x00000000000002c0
mair_el3 = 0x00000000004404ff
spsr_el3 = 0x00000000800003c4
elr_el3 = 0x000000009e80fe5c
ttbr0_el3 = 0x0000000070011cc0
esr_el3 = 0x00000000bf000000
far_el3 = 0x0000000000000000
spsr_el1 = 0x0000000000000000
elr_el1 = 0x0000000000000000
spsr_abt = 0x0000000000000000
spsr_und = 0x0000000000000000
spsr_irq = 0x0000000000000000
spsr_fiq = 0x0000000000000000
sctlr_el1 = 0x0000000000c8180d
actlr_el1 = 0x0000000000000000
cpacr_el1 = 0x0000000000000000
csselr_el1 = 0x0000000000000000
sp_el1 = 0x000000009e86b5c0
esr_el1 = 0x0000000000000000
ttbr0_el1 = 0x000000009e88b000
ttbr1_el1 = 0x0000000000000000
mair_el1 = 0x00000000ff00ff04
amair_el1 = 0x0000000000000000
tcr_el1 = 0x0000000080803fa0
tpidr_el1 = 0x0000000000000000
tpidr_el0 = 0x0000000000000000
tpidrro_el0 = 0x0000000000000000
par_el1 = 0x0400000002880b00
mpidr_el1 = 0x0000000080000000
afsr0_el1 = 0x0000000000000000
afsr1_el1 = 0x0000000000000000
contextidr_el1 = 0x0000000000000000
vbar_el1 = 0x000000009e801000
cntp_ctl_el0 = 0x0000000000000000
cntp_cval_el0 = 0x0000000000000000
cntv_ctl_el0 = 0x0000000000000000
cntv_cval_el0 = 0x0000000000000000
cntkctl_el1 = 0x0000000000000000
sp_el0 = 0x000000007000b2e0
isr_el1 = 0x0000000000000000
dacr32_el2 = 0x0000000000000000
ifsr32_el2 = 0x0000000000000000
cpuectlr_el1 = 0x0000001b00000040
cpumerrsr_el1 = 0x0000000000000000
l2merrsr_el1 = 0x0000000000000000

Change console from main_uart8 to main_uart3, rebuild ATF use :

make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed K3_USART=0x3

uboot change：
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index c44d167b5f..8589f3127b 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -12,7 +12,7 @@
 aliases {
 serial0 = &wkup_uart0;
 serial1 = &mcu_uart0;
- serial2 = &main_uart8;
+ serial2 = &main_uart3;
 i2c0 = &wkup_i2c0;
 i2c1 = &mcu_i2c0;
 i2c2 = &mcu_i2c1;
@@ -101,18 +101,22 @@
 u-boot,dm-spl;
 };

-&main_uart8_pins_default {
- u-boot,dm-spl;
-};
+// &main_uart8_pins_default {
+// u-boot,dm-spl;
+// };

 &main_mmc1_pins_default {
 u-boot,dm-spl;
 };

-&main_usbss0_pins_default {
+&main_uart3_pins_default {
 u-boot,dm-spl;
 };

+// &main_usbss0_pins_default {
+// u-boot,dm-spl;
+// };
+
 &wkup_pmx0 {
 u-boot,dm-spl;
 };
@@ -129,7 +133,11 @@
 u-boot,dm-spl;
 };

-&main_uart8 {
+// &main_uart8 {
+// u-boot,dm-spl;
+// };
+
+&main_uart3 {
 u-boot,dm-spl;
 };

 &main_mmc1_pins_default {
 u-boot,dm-spl;
@@ -133,9 +133,9 @@
 u-boot,dm-spl;
 };

-&main_uart8 {
- u-boot,dm-spl;
-};
+// &main_uart8 {
+// u-boot,dm-spl;
+// };

diff --git a/arch/arm/dts/k3-j721s2-common-proc-board.dts b/arch/arm/dts/k3-j721s2-common-proc-board.dts
index 55d2a2a789..50d901d6ad 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-common-proc-board.dts
@@ -18,11 +18,11 @@

 chosen {
 stdout-path = "serial2:115200n8";
- bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2830000";
 };

 aliases {
- serial2 = &main_uart8;
+ serial2 = &main_uart3;
 mmc0 = &main_sdhci0;

 &main_pmx0 {
- main_uart8_pins_default: main-uart8-pins-default {
- pinctrl-single,pins = <
- J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
- J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
- J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
- J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
- >;
- };
+ // main_uart8_pins_default: main-uart8-pins-default {
+ // pinctrl-single,pins = <
+ // J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
+ // J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
+ // J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
+ // J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
+ // >;
+ // };

- main_i2c3_pins_default: main-i2c3-pins-default {
+ main_uart3_pins_default: main-uart3-pins-default {
 pinctrl-single,pins = <
- J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */
- J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
+ J721S2_IOPAD(0x0c4, PIN_INPUT, 14) /* (AB26) UART3_RXD */
+ J721S2_IOPAD(0x0c8, PIN_OUTPUT, 14) /* (AD28) UART3_TXD */
 >;
 };
 &main_uart3 {
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart3_pins_default>;
+
+ /* Shared with TFA on this platform */
+ power-domains = <&k3_pds 352 TI_SCI_PD_SHARED>;
 };


diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index 9daa243d4e..3d62814611 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -12,7 +12,7 @@
 / {
 chosen {
 firmware-loader = &fs_loader0;
- stdout-path = &main_uart8;
+ stdout-path = &main_uart3;
 tick-timer = &timer1;
 };

@@ -97,12 +97,19 @@
 };

 &main_pmx0 {
- main_uart8_pins_default: main-uart8-pins-default {
+ // main_uart8_pins_default: main-uart8-pins-default {
+ // pinctrl-single,pins = <
+ // J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
+ // J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
+ // J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
+ // J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
+ // >;
+ // };
+
+ main_uart3_pins_default: main-uart3-pins-default {
 pinctrl-single,pins = <
- J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
- J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
- J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
- J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
+ J721S2_IOPAD(0x0c4, PIN_INPUT, 14) /* (AB26) UART3_RXD */
+ J721S2_IOPAD(0x0c8, PIN_OUTPUT, 14) /* (AD28) UART3_TXD */
 >;

-&main_uart8 {
+&main_uart3 {
 pinctrl-names = "default";
- pinctrl-0 = <&main_uart8_pins_default>;
+ pinctrl-0 = <&main_uart3_pins_default>;
 };

+// &main_uart8 {
+// pinctrl-names = "default";
+// pinctrl-0 = <&main_uart8_pins_default>;
+// };

diff --git a/arch/arm/mach-k3/j721s2/clk-data.c b/arch/arm/mach-k3/j721s2/clk-data.c
index ad6bd991b7..4042c4a9fa 100644
--- a/arch/arm/mach-k3/j721s2/clk-data.c
+++ b/arch/arm/mach-k3/j721s2/clk-data.c
@@ -268,6 +268,7 @@ static const struct clk_data clk_list[] = {
 CLK_MUX("gtc_clk_mux_out0", gtc_clk_mux_out0_parents, 16, 0x108030, 0, 4, 0),
 CLK_DIV("k3_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
 CLK_DIV("k3_pll_ctrl_wrap_wkup_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_wkup_0_sysclkout_clk", 0x4201011c, 0, 5, 0, 0),
+ CLK_DIV("usart_programmable_clock_divider_out3", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081cc, 0, 2, 0, 0),
 };

 static const struct dev_clk soc_dev_clk_data[] = {
@@ -393,11 +394,13 @@ static const struct dev_clk soc_dev_clk_data[] = {
 DEV_CLK(360, 18, "board_0_hfosc1_clk_out"),
 DEV_CLK(360, 22, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
 DEV_CLK(360, 23, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(352, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(352, 3, "usart_programmable_clock_divider_out3"),
 };
 const struct ti_k3_clk_platdata j721s2_clk_platdata = {
 .clk_list = clk_list,
- .clk_list_cnt = 104,
+ .clk_list_cnt = 105,
 .soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 122,
+ .soc_dev_clk_data_cnt = 124,
 };

diff --git a/arch/arm/mach-k3/j721s2/dev-data.c b/arch/arm/mach-k3/j721s2/dev-data.c
index e36f1edb78..b4ec75ca78 100644
--- a/arch/arm/mach-k3/j721s2/dev-data.c
+++ b/arch/arm/mach-k3/j721s2/dev-data.c
@@ -44,6 +44,7 @@ static struct ti_lpsc soc_lpsc_list[] = {
 [16] = PSC_LPSC(78, &soc_psc_list[1], &soc_pd_list[3], NULL),
 [17] = PSC_LPSC(80, &soc_psc_list[1], &soc_pd_list[4], &soc_lpsc_list[16]),
 [18] = PSC_LPSC(81, &soc_psc_list[1], &soc_pd_list[5], &soc_lpsc_list[16]),
+ [19] = PSC_LPSC(44, &soc_psc_list[1], &soc_pd_list[2], &soc_lpsc_list[12]),
 };

 static struct ti_dev soc_dev_list[] = {
@@ -71,6 +72,7 @@ static struct ti_dev soc_dev_list[] = {
 PSC_DEV(4, &soc_lpsc_list[16]),
 PSC_DEV(202, &soc_lpsc_list[17]),
 PSC_DEV(203, &soc_lpsc_list[18]),
+ PSC_DEV(352, &soc_lpsc_list[19]),
 };

 const struct ti_k3_pd_platdata j721s2_pd_platdata = {
@@ -80,6 +82,6 @@ const struct ti_k3_pd_platdata j721s2_pd_platdata = {
 .devs = soc_dev_list,
 .num_psc = 2,
 .num_pd = 6,
- .num_lpsc = 19,
- .num_devs = 24,
+ .num_lpsc = 20,
+ .num_devs = 25,
 };
diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h
index c84eaa4a20..25095c14b6 100644
--- a/include/configs/j721s2_evm.h
+++ b/include/configs/j721s2_evm.h
@@ -71,7 +71,7 @@
 "name_kern=Image\0" \
 "console=ttyS2,115200n8\0" \
 "args_all=setenv optargs ${optargs} " \
- "earlycon=ns16550a,mmio32,0x02880000 ${mtdparts}\0" \
+ "earlycon=ns16550a,mmio32,0x02830000 ${mtdparts}\0" \
 "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"

over 3 years ago

0 Tanmay Patil over 3 years ago

TI__Mastermind 42410 points

Hi,

Can you please refer to this FAQ and make sure you have all these changes on your side.

Regards,
Tanmay

0 shaofeng huang over 3 years ago in reply to Tanmay Patil

Prodigy 20 points

Hi Tanmay

Thanks Reply, I'm sure I modify the code reference to FQA.

ATF make option "K3_USART=0x3" designated serial port 3。

make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed K3_USART=0x3

u-boot modification details are in the post

Regards,
Shaofeng Huang

0 Keerthy J over 3 years ago in reply to shaofeng huang

TI__Guru**** 169140 points

Hi,

The R5 SPL is able to get the prints on the uart3. ATF is able to print as well. So could you please check if the a72 SPL has the right uart3 and the pins enabled in the dtb. Basically could you share the a72 spl dtb or if you can reverse compile the dtb to dts it will be helpful.

Thanks,

Keerthy

0 shaofeng huang over 3 years ago in reply to Keerthy J

Prodigy 20 points

Hi，

I have checked k3-j721s2-common-proc-board.dts in u-boot，the pins have been enabled。I have add dev and clk for main_uart3 in u-boot like this：

+ DEV_CLK(352, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(352, 3, "usart_programmable_clock_divider_out3"),
 };

+ CLK_DIV("usart_programmable_clock_divider_out3", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081cc, 0, 2, 0, 0),

+ [19] = PSC_LPSC(44, &soc_psc_list[1], &soc_pd_list[2], &soc_lpsc_list[12]),

+ PSC_DEV(352, &soc_lpsc_list[19]),

Does ATF need to add main_uart3 too ?


k3-j721s2-common-proc-board.dts:
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Common Processor Board: www.ti.com/.../J721EXCPXEVM
 */

/dts-v1/;

#include "k3-j721s2-som-p0.dtsi"
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy-cadence.h>
#include <dt-bindings/phy/phy.h>

/ {
 compatible = "ti,j721s2-evm", "ti,j721s2";
 model = "Texas Instruments J721S2 EVM";

 chosen {
 stdout-path = "serial2:115200n8";
 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2830000";
 };

 aliases {
 serial2 = &main_uart3;
 mmc0 = &main_sdhci0;
 mmc1 = &main_sdhci1;
 can0 = &main_mcan16;
 can1 = &mcu_mcan0;
 can2 = &mcu_mcan1;
 remoteproc0 = &mcu_r5fss0_core0;
 remoteproc1 = &mcu_r5fss0_core1;
 remoteproc2 = &main_r5fss0_core0;
 remoteproc3 = &main_r5fss0_core1;
 remoteproc4 = &main_r5fss1_core0;
 remoteproc5 = &main_r5fss1_core1;
 remoteproc6 = &c71_0;
 remoteproc7 = &c71_1;
 };


 vsys_3v3: fixedregulator-vsys3v3 {
 /* Output of LM5140 */
 compatible = "regulator-fixed";
 regulator-name = "vsys_3v3";
 regulator-min-microvolt = <3300000>;
 regulator-max-microvolt = <3300000>;
 regulator-always-on;
 regulator-boot-on;
 };

 vdd_mmc1: fixedregulator-sd {
 /* Output of TPS22918 */
 compatible = "regulator-fixed";
 regulator-name = "vdd_mmc1";
 regulator-min-microvolt = <3300000>;
 regulator-max-microvolt = <3300000>;
 regulator-always-on;
 regulator-boot-on;
 vin-supply = <&vsys_3v3>;
 // gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
 };


 vdd_sd_dv: fixedregulator-sd_dv {
 /* Output of TPS22918 */
 compatible = "regulator-fixed";
 regulator-name = "vdd_mmc1_dv";
 regulator-min-microvolt = <3300000>;
 regulator-max-microvolt = <3300000>;
 regulator-always-on;
 regulator-boot-on;
 vin-supply = <&vsys_3v3>;
 // gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
 };
};

&main_pmx0 {
 main_uart3_pins_default: main-uart3-pins-default {
 pinctrl-single,pins = <
 J721S2_IOPAD(0x0c4, PIN_INPUT, 14) /* (AB26) UART3_RXD */
 J721S2_IOPAD(0x0c8, PIN_OUTPUT, 14) /* (AD28) UART3_TXD */
 >;
 };

 main_mmc1_pins_default: main-mmc1-pins-default {
 pinctrl-single,pins = <
 J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
 J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
 J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
 J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
 J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
 J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
 >;
 };
};

&wkup_pmx0 {
 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
 pinctrl-single,pins = <
 J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
 J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
 J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
 J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
 J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
 J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
 J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
 J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
 J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
 J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
 J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
 J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
 >;
 };

 mcu_mdio_pins_default: mcu-mdio-pins-default {
 pinctrl-single,pins = <
 J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
 J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
 >;
 };

 mcu_uart0_pins_default: mcu-uart0-pins-default {
 pinctrl-single,pins = <
 J721S2_WKUP_IOPAD(0x0e8, PIN_OUTPUT, 2) /* (F27) MCU_UART0_TXD */
 J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT, 2) /* (F25) MCU_UART0_RXD */
 >;
 };
};

&main_gpio2 {
 status = "disabled";
};

&main_gpio4 {
 status = "disabled";
};

&main_gpio6 {
 status = "disabled";
};

&wkup_gpio1 {
 status = "disabled";
};

&wkup_uart0 {
 status = "reserved";
};

&main_uart0 {
 status = "disabled";
};

&main_uart1 {
 status = "disabled";
};

&main_uart2 {
 status = "disabled";
};

&main_uart3 {
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart3_pins_default>;

 /* Shared with TFA on this platform */
 power-domains = <&k3_pds 352 TI_SCI_PD_SHARED>;
};

&main_uart4 {
 status = "disabled";
};

&main_uart5 {
 status = "disabled";
};

&main_uart6 {
 status = "disabled";
};

&main_uart7 {
 status = "disabled";
};

// &main_uart8 {
// pinctrl-names = "default";
// pinctrl-0 = <&main_uart8_pins_default>;
// /* Shared with TFA on this platform */
// power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
// };

&main_uart9 {
 status = "disabled";
};

&main_i2c1 {
 status = "disabled";
};

&main_i2c2 {
 status = "disabled";
};

&main_i2c3 {
 status = "disabled";
};

&main_i2c4 {
 status = "disabled";
};

&main_i2c5 {
 status = "disabled";
};

&main_i2c6 {
 status = "disabled";
};

&main_sdhci0 {
 /* eMMC */
 non-removable;
 ti,driver-strength-ohm = <50>;
 disable-wp;
};

&main_sdhci1 {
 /* SD card */
 pinctrl-0 = <&main_mmc1_pins_default>;
 pinctrl-names = "default";
 disable-wp;
 vmmc-supply = <&vdd_mmc1>;
 vqmmc-supply = <&vdd_sd_dv>;
};

&mcu_cpsw {
 pinctrl-names = "default";
 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
};

&davinci_mdio {
 phy0: ethernet-phy@0 {
 reg = <0>;
 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 ti,min-output-impedance;
 };
};

&cpsw_port1 {
 phy-mode = "rgmii-rxid";
 phy-handle = <&phy0>;
};

&serdes_ln_ctrl {
 idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
 <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>;
};

&serdes_refclk {
 clock-frequency = <100000000>;
};

&serdes0 {
 serdes0_pcie_link: phy@0 {
 reg = <0>;
 cdns,num-lanes = <1>;
 #phy-cells = <0>;
 cdns,phy-type = <PHY_TYPE_PCIE>;
 resets = <&serdes_wiz0 1>;
 };
};

&usb_serdes_mux {
 idle-states = <1>; /* USB0 to SERDES lane 1 */
};

&main_mcan0 {
 status = "disabled";
};

&main_mcan1 {
 status = "disabled";
};

&main_mcan2 {
 status = "disabled";
};

&main_mcan3 {
 status = "disabled";
};

&main_mcan4 {
 status = "disabled";
};

&main_mcan5 {
 status = "disabled";
};

&main_mcan6 {
 status = "disabled";
};

&main_mcan7 {
 status = "disabled";
};

&main_mcan8 {
 status = "disabled";
};

&main_mcan9 {
 status = "disabled";
};

&main_mcan10 {
 status = "disabled";
};

&main_mcan11 {
 status = "disabled";
};

&main_mcan12 {
 status = "disabled";
};

&main_mcan13 {
 status = "disabled";
};

&main_mcan14 {
 status = "disabled";
};

&main_mcan15 {
 status = "disabled";
};

&main_mcan17 {
 status = "disabled";
};

0 Keerthy J over 3 years ago in reply to shaofeng huang

TI__Guru**** 169140 points

shaofeng huang said:
Does ATF need to add main_uart3 too ?

In the ATF the UART is functional as you are getting the below prints:

shaofeng huang said:
NOTICE: BL31: v2.6(release):v2.7-rc0-dirty
NOTICE: BL31: Built : 22:24:29, Dec 15 2022

So can you attach a debugger & check if the A72 is already executing from the A72 SPL or still stuck at ATF.

Best Regards,
Keerthy

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TDA4VM: Change console from main_uart8 to main_uart3 failed.