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Urgently need a DM8148 GEL file to enable EDMA.

Tianhua Chu
Intellectual 560 points

Hi All,

 

I urgently need a DM8148 GEL file which enables EDMA TPTC and TPCC regsiters.

Please help.

 

Thanks,

Philip

  • 0
    TI__Genius 15310 points

    Hi Phillip,

    Which device are you using?  Cent1 device or Cent2.1 device? On Cent1 device there is a known design issue because of which the TPCC registers will not be accessible through debugger (CCS memory window/watch window). This is fixed in Cent2.1 device. Please let me know if you are using Cent2.1 device already, then I will create and send you a gel file to enable clocks to EDMA.

    Regards,

    Viet

  • 0 in reply to Viet Dinh
    Intellectual 560 points

    Hi Viet:

     

    Thanks for your reply.

    I am using a DM8148 EVM  BTA version from Mistral.

    SN: MS_CAT_CBB_ BETA_0146

    What is Cent1 or Cent2.1 device?

     

    Regards,

    Philip

  • 0 in reply to Tianhua Chu
    TI__Genius 15310 points

    Philip,

    I think you are might be using Cent1 since Cent2.1 is very new.  Please contact your local FAE for update.

    If you are using Cent1, then TPCC registers can’t be accessed through CCS window.  That does not mean TPCC will not function. Only the debug access is forbidden in Cent1. Please check if to see EDMA actually functions (Don’t just go by the CCS memory window contents and conclude TPCC is not functional).

    Regards,

    Viet

  • 0 in reply to Viet Dinh
    Intellectual 560 points

    When my EDMA completion ISR reads these TPCC registers, the values turn out to be "BAD" as well as from the memory window. And I do need EDMA ISR to pass the data to McASP data port. So it won't go on without TPCC registers to be accessible.

     

    Thanks,

    Philip

  • 0 in reply to Tianhua Chu
    Intellectual 560 points

    Viet:

    Could you please send me the GEL file for Cent 2.1?

     

    Thanks,

    Philip

  • 0 in reply to Tianhua Chu
    TI__Genius 15310 points

    Philip,

    Could you try to add this to the GEL and try?

    PrcmEDMAEnable()
    {
     #define CM_ALWON_L3_FAST_CLKSTCTRL  (PRCM_BASE_ADDR + 0x1430) 
     #define CM_ALWON_TPCC_CLKCTRL  (PRCM_BASE_ADDR + 0x15F4) 
     #define CM_ALWON_TPTC0_CLKCTRL  (PRCM_BASE_ADDR + 0x15F8)
     #define CM_ALWON_TPTC1_CLKCTRL  (PRCM_BASE_ADDR + 0x15FC)
     #define CM_ALWON_TPTC2_CLKCTRL  (PRCM_BASE_ADDR + 0x1600)
     #define CM_ALWON_TPTC3_CLKCTRL  (PRCM_BASE_ADDR + 0x1604)
     
     GEL_TextOut("\tPRCM for EDMA Initialization in Progress \n","Output",1,1,1);
     
     WR_MEM_32(CM_ALWON_L3_FAST_CLKSTCTRL,   2);
     WR_MEM_32(CM_ALWON_TPCC_CLKCTRL,   2);
         WR_MEM_32(CM_ALWON_TPTC0_CLKCTRL,   2);
         WR_MEM_32(CM_ALWON_TPTC1_CLKCTRL,   2);
     WR_MEM_32(CM_ALWON_TPTC2_CLKCTRL,   2);
     WR_MEM_32(CM_ALWON_TPTC3_CLKCTRL,   2);
      
      GEL_TextOut("\tEDMA PRCM Enable in Done. TPCC and TPTC are enabled \n","Output",1,1,1);           
    }

    Regards,

    Viet

  • 0 in reply to Viet Dinh
    Intellectual 560 points

    Thanks Viet.

    Looks the TPTC0 - TPTC3 registers are accessible, but not the TPCC registers, which starts from 0x49000000.

    Does only Cent 2.1 work with the EDMA?

     

    regards,

    Philip

     

  • 0 in reply to Tianhua Chu
    TI__Genius 15310 points

    Philip,

    It works but not with CCS.  Cent 2.1 does work with CCS.

    Regards,

    Viet