SK-AM62: How to enable Power-On Self Test (POST)

Hello,
I'm passing your inquiry to our safety domain expert for his help on AM62x SoC level safety feature support.
Best,
-Hong

Hi, thanks for the help. I am still looking forward for the response by the expert.

Part Number: SK-AM62

Hi,

Is the SK-AM62 capable of running Power-On Self Test (POST)? If yes, how do I enable it?

I have added #define CONFIG_POST in am62x.h and I get the following error when building the image.

error: #error "_POST_WORD_ADDR currently not implemented for this platform!"

How can I solve this error?

Thanks.

Hello Lit Zhi,

Apologies for the delay. We are working to get your question to the right person. Please ping the thread again if you don't have a response within several business days.

Regards,

Nick

Hi Lit Zhi

Can you please share the software release that you are using? 

 AM62 doesn’t support HW POST.  There are BIST features (PBIST for Memory BIST and LBIST for BIST of the MCU CPU only) that this may be referring to.  It is not clear to use why you think  “CONFIG_POST” and “CONFIG_SYS_POST” will enable thie feature?  Is this defined somewhere in our documentation or code?  

I saw some information about CONFIG_POST in other threads so I thought I might try it out.

Also, I saw that in /post/drivers there are 4 tests which are flash.c, i2c.c, memory.c and rtc.c. Are these tests used for testing the MCU? How can I access and use these test scripts?

You mentioned about the BIST for memory and CPU, may I ask what steps do I need to do to enable this?

Thanks.

Hi Lit Zhi

Is the software you snapshotted from Linux SDK or from MCU SDK? From your snapshot this appears to be something in Linux SDK, however most of the POST code that you are snapshotting is for PowerPC and not ARM. 

BIST for memory and CPU is currently not supported and I do not think you will need this if you are not developing application that require functional safety.

I am not sure if there are any inbuilt test in our Linux SDK for CPU or RAM check out. Can you clarify the intent of what you are trying to do?

Regards

Mukul 

Hi,

The snapshot is from Linux SDK.

My intent is to find a way to stress test the memory in SPL stage or uboot stage. If possible, I would like to configure some settings of the RAM. Also, I want to test the peripherals in uboot.

For the memory test, I have done the mtest in uboot and the memtester in kernel. Are there any other tests I could use to test the memory?

Thanks

Lit Zhi

Hi Lit,

Lit Zhi Chee said:

For the memory test, I have done the mtest in uboot and the memtester in kernel. Are there any other tests I could use to test the memory?

Yes these are the tools we often use. If the board had DDR design issue, these tools would report DDR stress test failure.

For testing peripherals in uboot, you would have to refer to the uboot documentations, uboot provides many commands to access peripherals. Please note that not all commands are enabled in the default uboot binaries provided in the Processor SDK, you would have to enable their config and rebuild uboot to use the commands.

Regarding this, I still have some questions to clarify.

The path for the snapshot above is /home/litzchee/ti-processor-sdk-linux-am62xx-evm-08.04.01.03/board-support/u-boot-2021.01+gitAUTOINC+2dd2e1d366-g2dd2e1d366/post/drivers. This is from Linus SDK and the subfolder is in uboot, so I think the post tests can be enable and used in uboot. I am interested in running the memory test script (memory.c).

Mukul Bhatnagar said:

however most of the POST code that you are snapshotting is for PowerPC and not ARM.

Regarding the previous reply by Mukul, all architecture should run POST, according to this link u-boot/README.memory-test at master · ARM-software/u-boot · GitHub. Can you guide me on how to enable this generic POST test?

Thanks.

Hi Lit,

CONFIG_POST has never been enabled in U-Boot for any TI processor. This config is not supported in Processor SDK.

What do you intend to with with POST instead of mtest? Do you want to run the POST memory test every time booting the board? If so what is the purpose?

Does TI have the intention to enable POST?

My intent is that I want to carry out memory testing in early stage like in SPL or u-boot stage. I do not want to run POST test every time I boot the board, but I would like to look into and research about the memory test in POST. As discussed in this article https://github.com/ARM-software/u-boot/blob/master/doc/README.memory-test, uboot is not really a good solution because it has a lot of problems and difficult to use. So from there, I think the next best option for my case is POST.