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Problems about EMIF register configuration

Other Parts Discussed in Thread: TMS320C6713B

Hi all,

      I am doing my project with TMS320C6713B.
      When I interface a SDRAM with CE0 space of the EMIF, how can I configure the EMIF SDRAM Control Register(SDCTL)? I mean what's the proper value in the field of bits 23-20(TRCD), bits 19-16(TRP) and bits 15-12(TRC)? I can't find the clear explanations in the datasheets of both the SDRAM and EMIF Reference Guide(spru266e). Are there any application notes or documents about this configuration?