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AM3352: CLK Frequency setting

Part Number: AM3352

Hi Expert

Customer is currently developing AM3352BZCZ100 (1.0GHz) with a 12-inch LCM screen, and found some problems in the screen display parameter settings,

Customer uses the following table to set, but the PCLK is not 65MHz but measured to 96MHz

#define AM335X_PWM_PERIOD_NANO_SECONDS        (5000 * 1000)

#define FATEK_LCD_DISP_PANEL            24 /* bit */

    #define FATEK_LCD_RESOLUTION_X      1024

    #define FATEK_LCD_RESOLUTION_Y      768

    #define FATEK_LCD_PCLK                 65000000

    #define FATEK_LCD_MODULECLK    65000000

    #define FATEK_LCD_HSYNC              1344

    #define FATEK_LCD_VSYNC              808

    #define FATEK_LCD_HFP                   150

    #define FATEK_LCD_HBP                  150

    #define FATEK_LCD_VFP                   18

    #define FATEK_LCD_VBP                   18

Do I miss anything,Thanks

Daniel