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AM623: Consultation on frequency parameters and audio application

Part Number: AM623

Hi  TI

    一、There are two questions about the following table:

1. In the red box 1, why does the letter“ T ”have two frequencies that can be configured by the customer through software? How to configure? Are the two frequency hardware the same?

2. In the red box 2, how are High and Low defined or distinguished from hardware?

 二、Audio application related issues:

1. The customer is in the audio industry, and wants to use AM623 to realize the direct two-way data flow from McASP to two ETH ports. Is there any restriction?

2. Are the two Ethernet port switches fully supported by software? The customer requires redundant data transmission of two ETH ports;

3. Can H264 audio decoding be completely implemented with the Display Subsystem without using A53 core resources?

  •  Hello Rain Wang

    Thank you for the query.

    Let me review the frequency related question and update you.

    There are multiple domain question in the same thread.

    Can you start a new thread with title 

    AM623 Ethernet interface and add the below 2 questions 

    1. The customer is in the audio industry, and wants to use AM623 to realize the direct two-way data flow from McASP to two ETH ports. Is there any restriction?

    2. Are the two Ethernet port switches fully supported by software? The customer requires redundant data transmission of two ETH ports;

    Please start another thread and add the below question.

    3. Can H264 audio decoding be completely implemented with the Display Subsystem without using A53 core resources?

    This would help assign the queries to the right experts.

    Regards,

    Sreenivasa

  • Hi  Kallikuppa

          thanks for your support, Looking forward to your reply on Frequency.

          Another two threads have been opened for other problems.

  •  Hello Rain Wang

    Thank you for the note and appreciated. Please refer below inputs

    #1 is hardware – speed grade T devices support A53SS operating at 1400 MHz only when the core supply is 0.85V.  The max operating frequency is 1250 MHz when the core supply is 0.75V.  The value “0.75/0.85” was included in the table to show 1250 MHz is valid option for either operating voltage.

     We have been debating if we should remove value “0.75/0.85” and replace it with “0.75”.  I think it is understood any frequency lower than the max is a valid operating condition for A53SS.

     #2 is software, no hardware distinction – these operating points are defined by software.  I think the primary purpose is to offer a power saving operating mode. 

    Regards,

    Sreenivasa

  • Hello Rain Wang

    Here are some additional inputs

    The core voltage is fixed in the hardware. Customers need to choose the voltage when they design the hardware. It will also be influenced by device speed grade choice. The software will limit the max frequencies based on the speed grade information in the eFuse.

     Speed Grade T can support the highest clock frequency. It’s 1250 MHz at 0.75V and 1400 MHz at 0.85V. 1250 MHz at 0.85V can be an option if customers want to combine VDD_CORE and VDDR_CORE to reduce the number of power supplies. There is no limitation to using 0.75V for the 1250 MHz clock frequency.

     OPP High is the standard operating point. OPP Low is a lower power operating point by reducing interconnect clock frequency w/ reduced interconnect performance. It’s a choice by the software.

    Regards,

    Sreenivasa