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Occasional boot failure with AISgen

Hi

I've just managed to get the Logic EVM with C6748 SOM (d800k002, silicon rev 1) booting from SPI flash and running my application from DDR. However, I noticed now that booting fails in about 1 in 7 times. If it fails, it is stuck at 0xC00EB0A8 (BNOP.S1):

            SYS_EXITFXN, UTL_halt:
0xC00EB0A0:   01BC54F7            STW.D2T2      B3,*SP--[2]
0xC00EB0A4:   1FFF2012 ||         CALLP.S2      _HWI_disable (PC-1792 = 0xc00ea9a0),B3
            C$L1:
0xC00EB0A8:   0002A120            BNOP.S1       C$L1 (PC+8 = 0xc00eb0a8),5
0xC00EB0AC:   00000000            NOP
0xC00EB0B0:   00000000            NOP
0xC00EB0B4:   00000000            NOP
0xC00EB0B8:   00000000            NOP
0xC00EB0BC:   00000000            NOP
            CLK_TIMEFXN, CLK_F_gethtime, _CLK_gethtime:

My AISgen file is:  (remove .jpg extension). In it, I've setup PLL0, PLL1, DDR and PSC.

I would think it's a timing issue but I'm not sure where to look for. Anyone who has a clue?

Admar

 

  • Usually the UTL_halt function gets called as a result of a hardware exception (e.g. illegal instruction, etc.).  BIOS logs some very useful info just before calling this function.  To access that info from BIOS you need to open the LOG viewer (Tools -> RTA -> Raw Logs).  The very last lines should tell you some important info such as the type of exception, PC value at the time of the exception, etc.

    This type of thing can happen as a result of a stack overflow or uninitialized variable.  Hopefully there will be a good clue in the LOG viewer.  Some of the common issues are captured in the following wiki page:

    http://processors.wiki.ti.com/index.php?title=DSP_BIOS_Debugging_Tips

    Best regards,
    Brad

     

  • Hi Brad

    Thank you for your reply and hints about getting more info. For now, I'll have to focus on some other issues first (porting to our custom board), so we can show a working demonstrator. I'll get back to this issue later on.

    Best regards

    Admar

  • Just a follow up: I didn't have time to investigate the issues I've mentioned at the start of this topic. I saw those issues on my Logic development kit (C6748 rev 1).

    Since then I've moved to our custom board with a C6742 rev 2. I needed to make some changes to the gel file and AISgen file since we also have different memory (ISSI IS43DR16160A). I have booting working reliably now on this board and haven't seen any boot failure (yet) (after about 40 successful boots).

    Admar

  • HI Admar:

    We are using the logicPD SOM with a c6748 in our final app.  We have not been able to get the app to boot from flash and run from ddr.  Can you tell us what you did to get it to happen?

     

    Fred Skalka

  • Hi Fred

    What exactly is your problem? Can you successfully program the flash chip but do you have a wrong bootable image? Or is programming the flash chip causing you issues?

    If programming the flash chip is causing you problems: I'm using spiflash_writer; a program that I downloaded from the TI website somewhere, but I forgot where I got it. I think it is included in C6748_dsp_setupwin32_1_00_00_04.exe (see http://processors.wiki.ti.com/index.php/GSG_C6748:_Installing_the_SDK_Software). This program worked out of the box on the flash chip.

    Unfortunately this program did not work on our custom board, since we use a different type and manufacturer for SPI flash. I had to modify the program quite a lot, and then discovered that the code was actually badly written. I managed to make it working on our custom board, but I doubt that it still works on the Logic EVM.

    Thus, in hindsight, I think that the best option would have been to use SPIWriter; this is also recommended in the workshop (materials can be downloaded for free at http://processors.wiki.ti.com/index.php/C6000_Embedded_Design_Workshop_Using_BIOS; I've used rev 5.92). I had some issues to get this in a proper CCS4 project, and therefore tried spiflash_writer first, but I think it would be better to try to get SPIWriter working.

    If you can successfully program the flash chip, but booting is not successful, it could be several things:

    1. Wrong dipswitch settings: please pay special attention to how the dipswitches are routed on the EVM baseboard. If you look at the schematics on page 14, you'll see that switches 8 and 5 are connected to IO_3.3V_1.8V and 7 and 6 are connected to DGND. I have no clue why they did this, but it means that if you set all switches in the same position, you'll get 3.3 - 0 - 0 - 3.3 (or 0 - 3.3 - 3.3 - 0) volt on the bootpins of the DSP, and NOT 3.3 - 3.3 - 3.3 - 3.3 (or 0 - 0 - 0 - 0) volt!

    You can (more or less) check that you have the correct settings by using a logic analyzer on the SPI / I2C / ... bus that you try to boot from. Note that you will probably see some bits toggling on all those peripherals during booting due to startup conditions, but for the peripheral that you have selected you should see some extra bits, and those bits should actually make some sense.

    2. Wrong configuration file for AISgen. It could be that you forgot some peripherals or have wrong settings for your peripheral. It's a long time ago that I worked with the Logic EVM, but I think this was my final configuration file: 

    Boot Mode=SPI1 Flash
    Boot Speed=5
    Flash Width=0
    Flash Timing=3ffffffc
    Configure Peripheral=True
    Configure PLL0=True
    Configure SDRAM=False
    Configure PLL1=True
    Configure DDR2=True
    Configure LPSC=True
    Configure Pinmux=False
    Enable CRC=False
    Specify Entrypoint=False
    Enable Sequential Read=False
    Use 4.5 Clock Divider=False
    Use DDR2 Direct Clock=False
    Use mDDR=True
    ROM ID=0
    Device Type=1
    Input Clock Speed=24
    Clock Type=0
    PLL0 Pre Divider=1
    PLL0 Multiplier=25
    PLL0 Post Divider=2
    PLL0 Div1=1
    PLL0 Div3=3
    PLL0 Div7=6
    PLL1 Multiplier=25
    PLL1 Post Divider=4
    PLL1 Div1=1
    PLL1 Div2=2
    PLL1 Div3=3
    Entrypoint=c0000000
    SDRAM SDBCR=0
    SDRAM SDTMR=0
    SDRAM SDRSRPDEXIT=0
    SDRAM SDRCR=0
    DDR2 PHY=c4
    DDR2 SDCR=2034622
    DDR2 SDCR2=0
    DDR2 SDTIMR=20923249
    DDR2 SDTIMR2=3e141420
    DDR2 SDRCR=493
    LPSC0 Enable=3+4+5+6+9+10+11+12+
    LPSC0 Disable=
    LPSC0 SyncRst=
    LPSC1 Enable=1+2+3+4+5+7+9+10+11+12+13+14+15+16+17+18+19+
    LPSC1 Disable=
    LPSC1 SyncRst=
    Pinmux=0:44000000+4:11441100+5:111111+8:88800+10:8000000+14:8+18:800+19:88800+
    App File String=U:\Projects\PJ0095_-_Metatronics_-_Motion9\FilterAudio1ChannelAdaptive\Release\FilterAudio1ChannelAdaptive.out;
    AIS File Name=U:\Projects\PJ0095_-_Metatronics_-_Motion9\FilterAudio1ChannelAdaptive\Release\FilterAudio1ChannelAdaptive.bin
    
    . If I remember correctly, with this file I had external RAM on the SOM and SPI and UART working.

    3. Wrong code. This could also have several causes, but one specific one is this: as far as I understand now, you don't need to call EVMC6748_init() or EVMC6748_initRAM() in your user application, since AISgen already does (all?) of this. In fact, this was causing me issues, since the EVMC6748_init() function overwrote some correct settings from AISgen with wrong ones on our custom board!

    The best way to get started with booting from flash is to try getting a simple application (just blinking an LED) working from internal ram on the DSP. If that works, expand your AISgen config file and your application to use more peripherals such as external ram or PSC.

    Once you have your application working on the Logic EVM and you want to get your custom board working, probably the biggest issue is to get your external RAM working. The Logic EVM comes with MT47H16M16BG3, but this whole family is end of life. Therefore, we now use IS43DR16160A-37CBL on our board; slightly smaller but still plenty for our application. To calculate the correct register settings for your memory chip, use the Excel file at http://processors.wiki.ti.com/index.php/Programming_mDDR/DDR2_EMIF_on_OMAP-L1x/C674x.

    Admar

  • WOW!

    Thanks Admar!

    1) This is something I will have to check this.  I believe we have gotten at least one ap (the blinking lights) to run from flash. 

    2) This could be the problem.  We need to be able to run from mDDR on the LogicPD SOM.   I actually searched the forum on your name to see if their was anything else useful and found a whole message stream that dealt with that. I am waiting for our software guy to get some time to look at this. 

    3) This could also be the problem.  Again, I am waiting for our software guy to get some time to look at this. 

     

    Thanks again.

     

    Fred

  • Are you using the LogicPD BSL?  One of the init functions initializes the PLLs and DDR. If you have code/data in external memory then that is a bad thing!  Generally speaking I recommend doing that initialization with the AIS boot loader.