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Setting clock frequency in DSP/BIOS

Antony Barton
Intellectual 735 points
Other Parts Discussed in Thread: TMS320C5515

Hi guys,

I have recently implemented the AIC3204 example code using DSP/BIOS by using hardware interrupts in place of the polling used by the example code. It all works, but I am not getting the sample rate I expect and experience aliasing. Because I am running at (or trying to run at) 48kHz sample rate I am assuming that the aliasing I hear must be due to missed samples, or perhaps the clock speed is not what I am expecting such that it gets divided down to the wrong frequency for the codec.

This creates two questions:

- How could I be missing samples (if that is, indeed the problem) if the hardware interrupts work at all? Note that I have three other tasks running, but I have commented out all of the code and these should be preempted by the interrupts anyway.

or

- How can I verify that I am getting the clock speed I need without the use of a scope on the pins? It's not clear to me how DSP/BIOS sets the clock frequency, if indeed it does; If I use any code I have used before to set up the PLL (which works when not using DSP/BIOS), which should set the clock frequency to 100MHz, then the problem gets even worse.

 

Any ideas?

  • 0
    Expert 1440 points

    Antony,

    First, which processor are you working on?

    One way I can suggest to check if you are getting samples at the correct sampling frequency is this:

    Increment a global counter to the ISR everytime you get the interrupt.

    Run you program, keep a stop-watch or something to clock time and stop the code.

    See in say 5 sec, how many interrupts you are getting.

    You can calculate it for 48kHz. See if the counter value matches anywhere closely.

    Also, check the value of  PLL register in memory or even in you gel file where you actually set the PLL multiply and divide values.

     

    Aditi.

  • 0 in reply to Aditi Akula
    Intellectual 735 points

    Hi Aditi,

    Firstly, I am using a TMS320C5515, using the 5515 evm. I've run the program for about 20s and it looks like I'm getting about 12ksps. Because of the aliasing, I'm assuming that I am simply missing samples (as if the clock were set incorrectly, everything would scale as the 5515 is the master device for the I2S connection), about 3 out of 4 missed, but I have no idea why.

    I'm using the gel file that was provided with the EVMs target configuration (output pasted below for reference).

    C55xx: GEL Output: Reset Peripherals is complete.

    C55xx: GEL Output: Configuring PLL (100.00 MHz).

    C55xx: GEL Output: PLL Init Done.

    C55xx: GEL Output: SDRAM Initilization Complete.

    C55xx: GEL Output: Target Connection Complete.

    I am, however, having trouble checking the PLL registers in memory as they wont seem to update in the watch panel - though I'm sure this is mainly because I don't know how to do it properly yet.

    Many thanks,

    Antony

     

    Update : I just copied the contents of the PLL registers to some variables and this allowed me to read  them - and the values do give the approximate clock frequency of 100MHz.

  • 0 in reply to Antony Barton
    Intellectual 735 points

    Hi,

    Turns out the problem was that I had failed to update the I2S clock generator such that it was divided too much (I2S2_SRGR register, 0x2A04). Interestingly the clock speed is not accruate even now (i'm getting about 48.8kHz), but I'm sure that's just because it's only example code.