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DM365 NAND EXCHANGE ISSUE.

Jay Hong
Intellectual 865 points

 

Hello everybody.

Now I'm using DM365 and I have used the NAND(samsung K9F1G08UC) but it has been kill off the produce.
so I decided to change the nand part to K9F1G08U0D–SCB0 .
However, we are currently facing serious problems.
current symptoms is that Nand writing is no problem. all files - UBL,Bootloader, kernel, ramdisk - writing without error.
After reboot, UBL and u-boot works fine.
But, when I read the Nand section on the u-boot prompt, every Nand section are recognized bad section include ubl, u-boot and can't read the data.
I have no idea what's going on.

When I compare to both datasheet, read/write timing is a bit changed and ECC detection is changed from 4bit to 1bit.
Current nand write use 4bit ECC. if it's changed, does it possible to occurs above error?
I searched the e2e, but it seems no problem.( http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/100/p/98648/345060.aspx#345060 )

What do I need to check?
We should go into mass production right now. Please give a goot hint.

Regards.
Jay.

  • 0
    TI__Genius 9510 points

    It's likely the ROM is using 1bit ECC based on the device ID, however, the u-boot is probably still using 4bit ECC scheme and layout.  Therefore you may need to modify u-boot to use 1 bit ECC. 

     

  • 0 in reply to Marcus Cooksey
    Intellectual 655 points

    hello jay,

    I am facing the same problem like you described. Have you been successfull to solve this?

     

    Josef

  • 0 in reply to Josef Kohler12051
    Intellectual 280 points

    Hi:

              Which uboot you are using, are you using the uboot from dvsdk? I have some problems with the nand flash, which after switching  from K9F1G08U0C to K9F1G08U0D , the uboot version was 1.3.4, after switch to uboot from dvsdk, my problem is fixed.

    Patrick

  • 0 in reply to Patrick Chau
    Guru 31670 points

    Jay

    There are timing difference in the NAND. Refer to the AC timing characteristics. This you can try by changing the timing parameters. But I think the timing parameters may not help you directly. I feel that the busy pin has to be used properly. I'm not really sure in your u-boot its implemented properly. I have seen issues before in busy/wait pin support in u-boot.

  • 0 in reply to Renjith Thomas
    Intellectual 865 points

     

    I missed to check the verify.

    I notify to the development team and there's a no more issue.

    Marcus gave the clue and it may fixed on newer version of dvsdk as Patrick said.

    I appriciate your interest.

    Thank you.

    Jay

  • 0 in reply to Jay Hong
    Prodigy 10 points

    I tested New u-boot source code. (DaVinci-PSP-SDK-03.21.00.04)

    Samsung nand (SEC_K9F1G08U0D) is normal behavior.

    Samsung nand, I know that there are differences in the timing. (tR)

    so, I want to see source code about Samsung nand's patch.

    1) source code path ,  function name

     I think, The kernel driver must also be considered.

    now kernel error log)
    nand_davinci_4bit_compare_ecc Too many errors to be corrected!
    nand_davinci_4bit_compare_ecc Too many errors to be corrected!
    nand_davinci_4bit_compare_ecc Too many errors to be corrected!
    nand_davinci_4bit_compare_ecc Too many errors to be corrected!

    If you know please respond.

     

     

     

  • 0 in reply to Jay Hong
    Expert 2405 points

    Hi Jay,

        can you confirm the problem was only on the1 bit ecc and not on the timings?

    Did you have to modify the kernel too?

    Best Regards,

    mario