TDA4VM: A72 appLogGetGlobalTimeInUsec is zero

Hi,

Are you sure that the GTC is running fine? Can you please check if it is enabled (0xA90000 offset should be set to 0x1)? Typically it would be enabled during boot up. But not sure if it is getting disabled? 

Regards,

Brijesh

I confirm that 0xA90000 is enabled

root@j784s4-evm:~# devmem2 0x00a90000
/dev/mem opened.
Memory mapped at address 0xffffb67d1000.
Read at address  0x00A90000 (0xffffb67d1000): 0x00000001

root@j784s4-evm:~# devmem2 0x00a90020
/dev/mem opened.
Memory mapped at address 0xffffb6b4a000.
Read at address  0x00A90020 (0xffffb6b4a020): 0x00000000

root@j784s4-evm:~# devmem2 0x00a90008
/dev/mem opened.
Memory mapped at address 0xffff83396000.
Read at address  0x00A90008 (0xffff83396008): 0x889D4AEA

Hi,

But GTC seems to be running fine. Can you please try reading value at the offset 0x00a90008 multiple times and see if the values are changing? 

Btw, i see you are using j784s4. For this device, which SDK release are you using? 

Regards,

Brijesh

Also can you please share the value at 0x00a90020 and 0x00a90024 offsets? 

If the value at this location is not set, can you please try setting the value manual to 200MHz and see if everything works fine? 

Regards,

Brijesh

Thank you. When I manually write 200MHz to 0x00a90020, I can run it successfully. But why should I write it? Is it not supported by sdk by default?

Strange, as such it should work fine, SDK 08.05 is very well tested.. Let me also check it out tomorrow..

Thanks, please let me know if you have a conclusion

There may be another point to note that I booted from the sd card

Also can you please confirm that you are using SPL boot flow? 

Regards,

Brijesh

I had quick look at SPL boot flow and SD card with vision apps running on R5F, i see that this register is setup correctly for 200MHz frequency, so dont see this issue. 

Are you using different setup, boot device or boot mode or boot flow?

Regards,

Brijesh

I can't use spl boot flow now. Can you tell me where is the configuration code for 200MHZ? I'll check the code first

Hi,

Can you please check if you have below lines in pdk/packages/ti/drv/sciclient/src/sciserver/sciserver_tirtos.c? I am wondering if this is creating issue in setting up correct clock in GTC registers..

/*
* Temporary hack for PDK-8511
* Configure the GTC clock to 200MHz to match SPL's expected frequency
*/
if (ret == CSL_PASS)
{
#include <tisci_devices.h>
#include <tisci_clocks.h>
Sciclient_pmSetModuleClkFreq(TISCI_DEV_GTC0, TISCI_DEV_GTC0_GTC_CLK,
200000000, 0x0, SCICLIENT_SERVICE_WAIT_FOREVER);
}

Regards,

Brijesh

I can't find this code in sciserver_tirtos.c. Can you tell me the location of the function where the code is located, I will add it, and try to solve this problem

ok, let me share you exact steps for including this change and building it.

Regards,

Brijesh

You don't seem to share. where can i see it

Please follow below steps and check the output?

1, Apply attached patch on ti-processor-sdk-rtos-j721e-evm-08_05_00_11\pdk_jacinto_08_05_00_36

/cfs-file/__key/communityserver-discussions-components-files/791/GTC_5F00_Fix.patch

2, go to ti-processor-sdk-rtos-j721e-evm-08_05_00_11\pdk_jacinto_08_05_00_36\packages\ti\build folder and use below command to rebuild sciserver.

"make ipc_echo_testb_freertos CORE=mcu1_0 BOARD=j721e_evm -sj "

3, copy generated binary "ti-processor-sdk-rtos-j721e-evm-08_05_00_11\pdk_jacinto_08_05_00_36\packages\ti\binary\ipc_echo_testb_freertos\bin\j721e_evm\ipc_echo_testb_freertos_mcu1_0_release_strip.xer5f" to PSDKLA\board-support\prebuilt-images folder.

4, goto PSDKLA top level folder and run "make u-boot" to rebuild uboot

5, copy generated uboot binaries to BOOT partition of the SD card.

cp board-support/u-boot_build/a72/u-boot.img /media/$(USER)/BOOT/
cp board-support/u-boot_build/a72/tispl.bin /media/$(USER)/BOOT/
cp board-support/u-boot_build/r5/tiboot3.bin /media/$(USER)/BOOT/

Regards,

Brijesh

By the way, I am using TDA4VH. Do you also modify it in this way?

Which SDK release are you using for TDA4VH? 

Regards,

Brijesh

Rtos 08_05_00_11 SDK

ok, the method will remain same. The difference is only that it uses combined bootflow, so we dont need to copy sysfw.itb file and tiboot3.bin will be available somewhere in k3-resource-partition tool folder. 

Rgds,

Brijesh