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DMA Burst Transfers

Pedro Lopes
Prodigy 100 points

Hi,

We have a doubt about burst tranfers.

When a burst tranfer occours and the channel doesn't have permission to write, what happen with the elements that are coming into the FIFO if the frame has more than nine elements? Are these elements lost or is the channel initialized again? Is there any interruption to advise the CPU that a transfer failed?

  • TI__Mastermind 41665 points

    Assuming the standard C64x+ EDMA3 (likely applies to other TI DMAs as well), a bursting transfer will stall if an endpoint is not available immediately for some reason, so the transfer just slows down but you should not be losing data in the DMA itself thus there is no interrupt. You would only lose data if a real time deadline is broken with something you are servicng with the DMA (for example a video port is not serviced in time).