AM625: Ethernet driver capabilities

Jhon Q

Part Number: AM625

Hi,

About Ethernet driver capabilities of the AM62x,

For the Ethernet ports we need to disable the internal TX Clock Delay in registers 0x00104044, 0x00104048. Is it possible to configure this bit via dts file?

Will appreciate your support on the above.

Thanks,

Jhon

over 3 years ago

0 Schuyler Patton over 3 years ago

TI__Mastermind 41440 points

Hi,

Could you please indicate PHY mode (RGMII). Why you want to disable internal tx clock delay? Which PHY are you using?

I checked the binding docs for cpsw, Ethernet and an example phy. I didn’t see anything there which is probably why you are asking. I will check with the development on your question.

Best Regards,

Schuyler

0 Jhon Q over 3 years ago in reply to Schuyler Patton

Intellectual 265 points

Hi,

I have a filter in series which creates this delay so need to disable it in SW

please check if this is possible

Thanks

Jhon

0 Schuyler Patton over 3 years ago in reply to Jhon Q

TI__Mastermind 41440 points

Hi,

Is this what you are talking about setting the PHY mode to "rgmii-id"? This setting in the device tree will disable the MAC's internal delay

Best Regards,

Schuyler

0 Jhon Q over 3 years ago in reply to Schuyler Patton

Intellectual 265 points

Hi,

Yes this exactly what we were looking for.

We saw this field before, but seems the driver does not support changing the fourth bit in the register.

The struct here:

https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/phy/ti/phy-gmii-sel.c?h=linux-5.10.y#n186

Does not have the needed field:

.features = BIT(PHY_GMII_SEL_RGMII_ID_MODE),

Is it correct or I am missing something?

Thanks,

Jhon

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AM625: Ethernet driver capabilities