Hardware Design Guide for Keystone Devices p 75 out of 120:
In Table 11, there are 4 VCNTL pins (VCNTL3:0) however they seem to represent 6 bits? Why is that so?
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Hardware Design Guide for Keystone Devices p 75 out of 120:
In Table 11, there are 4 VCNTL pins (VCNTL3:0) however they seem to represent 6 bits? Why is that so?
It's 4pins, but it's 6bit data - 3pins for data one for select. So it's sent in two data sets (LSBs and MSBs.)
Best Regards,
Chad
Where is the document (document and page) that says this? I could not find it in the c6672 datasheet and keystone hardware design guide document.
The interface is described in section 7.3.4 Smartreflex in the C6672 data manual. Figure 7-9 illustrates the use of VCNTL[2:0] as a three bit data interface and VCNTL3 as a command bit to represent the six bits needed for smartreflex.