Hi,
We have a S29GL01GP11 NOR flash on our c6a816x board. This is the same family of flash that is on our DDR2 EVM (actually on IODC) but I'm having trouble understanding the SPRUGx9 formulas for calculating what needs to go into the GPMC_CONFIGx regs. The formulas (and examples) appear to be written for a flash that uses an ADV line and has jedec specs. for tAAVDS, tAVDP etc. and our NOR flash has none of this.
The cycle time on the larger part is a bit longer. Can a TI person familiar with this area of the GPMC help me out?
I "think" my issue is timing but it could be something with the address lines. (edit) I took the norflash-writer source and modified it as our GPMC_A11-GPMC_A26 are different. I made a small hex file and flashed it and it did OK but when I used the memory browser in CCS5 the pattern I wrote was twice as much as I asked for. I wrote 4k and 8k showed up in the memory browser. If I try to make my test file bigger than 4k the programming fails and my guess is maybe the buffer overruns and these Spansion chips abort when that happens.
Thanks,
Brian