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AM5729: Enable DSP1_EDMA

Part Number: AM5729

Hello,

I am trying to use the DSP1_EDMA of AM5729 to carry out a DMA transfer between external memory (DDR) and McASP. 


I am not able to read correct values from the DSP1 EDMA CC registers. I read on page 1749 of the TRM that DSP_EDMA needs to be manually removed from Idle/Standby mode.  Based on this note, I feel may be the DSP_EDMA is in idle state in my case. What register needs to be configured to remove DSP_EDAM out of Idle?

Another question - Can the DSP1_EDMA be used to have DMA transfers between McASP and external DDR memory or the system EDMA would need to be used? 

Any help on this is appreciated. 

Thanks,

Dimple

  • Hi Dimple,

    Are you referring to any of PDK examples for this? If yes, can you please share the example that you are using?

    Regards,
    Parth

  • Hi Parth,

    I am trying to use the DSP1_EDMA in my own project. Here is a snippet of the same  -

    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    int main(void)
    {
    uint32_t readVal;
    const char* str;

    EDMA3_DRV_PaRAMRegs paramRegTx;
    uint32_t txChId;
    uint32_t txTccId;
    uint32_t addr,paramResult;
    unsigned int regValue;
    EDMA3_DRV_Result result;

    Hw_WR_REG32(0x40D00008, 0x0000003C);
    result = setup_edma3_driver();
    result = set_src_buffer();

    txChId = EDMA3_DRV_HW_CHANNEL_EVENT_3;
    txTccId = EDMA3_DRV_TCC_ANY;
    result = EDMA3_DRV_requestChannel(dsp1_edma_drv_handle , &txChId , &txTccId, (EDMA3_RM_EventQueue) 0, NULL,NULL);

    EDMA3_DRV_setPaRAM(dsp1_edma_drv_handle, txChId, &paramRegSetTx);

    result = EDMA3_DRV_getPaRAM(dsp1_edma_drv_handle, txChId, &paramRegTx);

    result = EDMA3_DRV_getPaRAMPhyAddr(dsp1_edma_drv_handle, txChId, &addr);

    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x4060, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x4064, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x4068, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x406C, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x4070, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x4074, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x4078, &regValue);
    EDMA3_DRV_getCCRegister (dsp1_edma_drv_handle, 0x407C, &regValue);

    HW_WR_REG32(0x40D14060, 0x0);
    readVal = HW_RD_REG32(0x40D14060);

    HW_WR_REG32(0x40D14064, &srcBuff);
    readVal = HW_RD_REG32(0x40D14064);

    HW_WR_REG32(0x40D14068, 0x0001000A);
    readVal = HW_RD_REG32(0x40D14068);


    readVal = HW_RD_REG32(0x40D1406C);
    readVal = HW_RD_REG32(0x40D14070);
    readVal = HW_RD_REG32(0x40D14074);
    readVal = HW_RD_REG32(0x40D14078);
    readVal = HW_RD_REG32(0x40D1407C);

    result = EDMA3_DRV_getPaRAMEntry(dsp1_edma_drv_handle, txChId,(EDMA3_DRV_PaRAMEntry) 0, &paramResult);


    return (0);
    }

    --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    I am trying to set the Param Set of Channel 3 of DSO1_EDMA using the structure paramRegSetTx structure. However, when I read back the param set in the paramRegTx structure, I don't see the same values I had set. Also, writing into the actual physical address of the param Set  and reading back the same does not result in the correct values. Same is the case if I use the EDMA3_DRV_getCCRegister() API. Is there anything I am missing to enable the DSP1_EDMA controller or to bring it out of idle state?

    Another note - since there are no sample initialization files like the sample_*_cfg.c and sample_*_init_reg.c for the AM5729, I am defining the global config parameters for the DSP1_DMA in my project itself. Does that have anything to do with the driver not working as expected?

    Thanks,

    Dimple

  • Hi Dimple,

    Apologies for delay in response.

    - Can the DSP1_EDMA be used to have DMA transfers between McASP and external DDR memory or the system EDMA would need to be used? 

    Yes, DSP EDMA or System EDMA can move data to/from DDR from/to McASP FIFO. Please refer to the AM572x TRM Chapter 24.6.4.10.1.6 Using the DMA for McASP Servicing. You'll have to have to route McASP DMA request to DSP EDMA in DMA_CROSS_BAR Control module.

    Another note - since there are no sample initialization files like the sample_*_cfg.c and sample_*_init_reg.c for the AM5729, I am defining the global config parameters for the DSP1_DMA in my project itself.

    The tda2xx cfg defines all 3 EDMA instances {System, DSP, EVE}. You don’t need a separate one for DSP. Please refer to the thread: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/911436/ccs-tda2eg-17-i-found-edma3_lld_2_12_05_30c-use-system-edma-not-dsp_edma-how-to-change?tisearch=e2e-sitesearch&keymatch=DSP_EDMA#

    I am trying to set the Param Set of Channel 3 of DSO1_EDMA using the structure paramRegSetTx structure. However, when I read back the param set in the paramRegTx structure, I don't see the same values I had set. Also, writing into the actual physical address of the param Set  and reading back the same does not result in the correct values. Same is the case if I use the EDMA3_DRV_getCCRegister() API.

    This might be the case due to wrong address mapping. Please see the suggestion in the post https://e2e.ti.com/support/processors-group/processors/f/processors-forum/874328/am5728-dsp-edma-issue/3237720?tisearch=e2e-sitesearch&keymatch=DSP_EDMA#3237720

    Essentially, When you use the system EDMA (even from DSP1) source and destination buffer must be given in "system view" address.
    When you switch over to DSP1_EDMA both buffers must be given in "local view" address.

    Regards,
    Parth