I am following the steps outlined in the SRIO User's Guide (SPRU976.pdf) to enable the SERDES channels (in 1 4x port mode). After setting the SERDES configuration registers I see that only the transmitters for lanes 0 and 2 are turned on. Lanes 1 and 3 read back 0x00010800 in the SERDES_CFGTXn_CNTL register. The documentation gives no explanation of why bit 0 of this register would read back 0 after I write a 1 to it. The documentation suggests this register is read/write, so that I would expect it ALWAYS to read back what I just wrote to it.
Has anybody else experienced a similar problem? Can anybody tell me what bit 0 in the SERDES_CFGTXn_CNTL register is actually showing me? Or any idea why ports 0 and 1 would turn on while ports 1 and 3 do not??