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EDMA Loading PaRAM

1258021
Genius 5120 points
Other Parts Discussed in Thread: OMAP-L138

Hi,

Processor: OMAP-L138

Our requirement is that we will be receiving data continuously from a peripheral which is connected via EMIFA bus.

The peripheral sends 128KB data per second. So, for this we have allocated two Buffers in our code.

So, once the first 128 KB buffer transfer is completed then the other 128KB memory EDMA would be reading data.

I understand that using Linking we can initiate another transfer.

But, our observation is we have to load PaRAM on every tranfer completion. 

Is there any feature that EDMA supports, which avoids loading PaRAM? or Else does is supports something like Frame Interrupt (for first 128KB data) and Block Interrupt (For 2nd 128KB data) ?

Thank You & Regards,

GSR

  • 0
    TI__Intellectual 1640 points

    GSR,

    With AB-Synchronized Transfers mode, sync events will only be generated for the transfer of one frame.  But due to the size limit of (A|B|C)CNT, (SRC|DST)BIDX and (SRC|DST)CIDX in a PaRAM set, the data still need to be partitioned into 3 dimensions of arrays of data.  As such, loading the PaRAM cannot be avoided.

    Regards,

    WM

  • 0 in reply to WMK
    Genius 5120 points

    Hi WM,

    Thank You for your reply.

    As we are using A-Synchronized Transfers we are using the following configuration

    ACNT=2, BCNT= 64000 CCNT=1.

    Basically for having Ping - Pong mechanism we are using Link Channel.

    So, on one channel the Ping buffer receive completes, the Pong Buffer is filled using Link Channel.

    Our observation is after completion of one transfer we are able to see transfer completion event.

    But, after one transfer completion do we have load PaRAM once again?

    I understand loading PaRAM during EDMA setup is ok.

    I am looking at a feature, where in we have to load PaRAM once and it should able to read data without loading or configuring EDMA.

    Let me know if such feature is supported by EDMA.

    Regards,

    GSR

  • 0 in reply to 1258021
    TI__Intellectual 1640 points

    GSR,

    If LINK address in ping's PaRAM points to pong's PaRAM and vice versa for pong, then isn't that what you are looking for?  Are you looking for a feature that even this reloading of PaRAM by the EDMA3CC be avoided? 

    In case you haven't done so, you may find section 3.4.4 of the edma3 user guide helpful.

    Regards,

    WM

  • 0 in reply to WMK
    Genius 5120 points

    Hi,

    OS:WinCE 6.0 R3, Processor:OMAP-L138

    HW: CPLD is connected via EMIFA interface

    Before calling EDMA3_Drv_enableTransfer API in WinCE for starting a EDMA transfer the EDMA configuration is observed as below

    OPT=0x8011c100 SRCAddr=0x60001000 ACNT=0x2 BCNT=0xfa00 DestAddr=0xc179c000 SRCIdx=0x0 DstIdx=0x2 LINK=0x4480 BCNT Reload=0x0 SRC CIdx = 0x0 DST CIdx=0x0 and CCNT=0x1

    OPT=0x8011c100 STCAddr=0x60001000 ACNT=0x2 BCNT=0xfa00 DestAddr=0xc17bb400 SRCIdx=0x0 DstIdx=0x2 LINK=0x4380 BCNT Reload=0x0 SRC CIdx = 0x0 DST CIdx=0x0 and CCNT=0x1

    With this configuration I am waiting for EDMA Event to occur in a thread. The EDMA event is created by calling EDMA3_DRV_getTransferEvent.

    My understanding is as I had used LINK addr Ping-Pong mechanism should work even if I do not call EDMA3_DRV_setPaRAM in EDMA Event thread.

    Do I have to call call setPaRAM API even though I had used LINKing concept?

    When Ping-Pong Buffer is used with Linking concept, when EDMA completes to either Ping buffer or pong buffer edma event is generated. In that case I would like to know which buffer have been filled by the EDMA. Is there any register that we can read for this?

    Thanks for your time.

    Regards,

    GSR

  • 0 in reply to 1258021
    Genius 5120 points

    Hi,

    Aim: Is to fill Ping Pong buffers. After Ping buffer is filled, EDMA is filling Pong buffer process ping buffer and vice versa

    Till yesterday I was requesting for the first channel using the EDMA3_DRV_requestChannel API and the ChannelId is equal to 28. (GPIO_4_01 is used as Event Trigger)

    Second channel is allocated with ChannelId equals to EDMA3_DRV_LINK_CHANNEL.

    I am setting Src Params, Dest Params, Src Idx, Destination Index, Transfer Parameters and OPT Field for the ChannelId with 28 and Second Channel with CHAN ID= EDMA3_DRV_LINK_CHANNEL.

    At the end I am calling EDMA3_DRV_linkChannel for Linking both the channels.

    EDMA3_DRV_linkChannel (28, EDMA3_DRV_LINK_CHANNEL) and EDMA3_DRV_linkChannel (EDMA3_DRV_LINK_CHANNEL , 28).

    My question is will Ping-Pong mechanism works with this procedure.

    Becuase when I looked at the Wavedev2 source code at the following path for OMAP-L138 SRC\DRIVERS\WAVEDEV2 in audiodma.cpp file in AUdioDMA::Start total three channels are used for linking.

    What is the correct procedure or sequence and number of channels that we need to allocate for Ping-Pong read to work without processor intervention?

    Please advise on this and Thank you for your time.

    Regards,

    GSR

  • 0 in reply to 1258021
    Genius 5120 points

    Hi,

    Looks my question is not clear.

    Basically my requiremnt is to read from a 16 or 32-Bit CPLD Register which is interfaced via EMIFA.

    Also, the read shall be in continuous loop for filling Ping and Pong buffers.

    Please let me know how many channels do I have to allocate using EDMA.

    Second question is the running code should know currently which buffer was filled by the EDMA when I get EDMA interrupt. So, that the running code can process the filled buffer while DMA is happening to the other buffer.

    Please advise on this.

    Thank You & Regards,

    GSR

  • 0 in reply to 1258021
    TI__Expert 3710 points

    If it is in one direction (read), you would need only 1 channel with two PaRAM sets. You can have a look at this guide:

    http://www.ti.com/lit/an/spra636a/spra636a.pdf

    Although it is for DSP, concepts are similar and it explains things with examples. It also addresses your second question about synchronization with CPU

     

    thanks

    Atul

  • 0 in reply to Atul Verma
    Genius 5120 points

    Hi Atul Verna,

    Thank you for your time and the document.

    Basically I am able to achieve Ping-Pong buffer mechanism after referring Audiodma.cpp source file in OMAP-L138 BSP.

    I am looking for a mechanism or API...which informs about currently which buffer is using EDMA controller (Whether Ping Buffer or Pong Buffer?)

    Why am I asking this is for example if EDMA is using Ping now the processor can process Pong buffer and vice versa....

    Is the answer obvious? So, that on very first interrupt EDMA completed filling Ping buffer and using Pong buffer for transferring data to it and so on for subsequent transfers?

    First I am enabling EDMA transfer using EDMA3_DRV_enableTransfer API. After that only I am enabling our peripheral control register (which is implemented in CPLD via EMIFA) to start the transfer....

    After first interrupt occurs I am calling EDMA_DRV_getPARAM to read the Destination buffer value. So, that I will understand that currently EDMA is using the .destAddr buffer, so that I can inform some other thread to use the other buffer.

    I hope you understand what for I am looking. Let me know if you need any other details.

    Regards,

    GSR

     

  • 0 in reply to 1258021
    TI__Expert 3710 points

    Did you read section 4.4.4.1 - basically you need an intermediate interrupt to tell CPU when DMA switches to alternative buffer

    Atul

  • 0 in reply to Atul Verma
    Genius 5120 points

    Hi Atul Verma,

    Yes I referred that section. Now, I am using EDMA3_DRV_getPaRAMEntry to read the destination address for every EDMA transfer completion interrupt. So, that the program will come to know that the other buffer which it can process now.

    Thank You so much for your time and sharing document.

    I will post here if I face any other issues.

    Regards,

    GSR

  • 0 in reply to 1258021
    Genius 5120 points

    Hi,

    I am using Event number 28 for DMA transfer while reading from a peripheral which is connected via EMIFA.

    So while requesting a EDMA channel using EDMA3_DRV_requestChannel API i have used EDMA3_DRV_HW_CHANNEL_EVENT_28 as the Channel Id.

    EDMA is able to read from it with no issues.

    Now, I want to allocate another EDMA channel for writing data which is connected via EMIFA and also the synchronization event has to be Event 28 only.

    So, basically what am I looking for is use the same snchronization event for reading and writing simultaneously with two different EDMA channels? Let me know if it is achievable using EDMA?

    Thank You & Regards,

    GSR