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Bootloader TMS320C6424

Ulrich Pahl
Prodigy 20 points
Hi all! I've found in the latest datashheet of the C6424 (sprs347c) that the bootloader support now 24-bit SPI boot (boootmode 0x1111). But there is no additional information available how it will work. That means: How does the software programm the McBSP? How does the read of the SPI device works, that means: SPI read command + 24-bit address = 32bit, how many data is read (8 bit or more)? Which SPI Master clock frequencies are used in Fatsboot?
  • 0
    TI__Genius 17355 points

    Ulrich, this new boot mode is briefly mentioned in the spraak5a document, listed in Table 1.  There it indicates that this mode requires the use of the McBSP0 and GPIO97 pin, which acts as the CS signal to the SPI device.  The FSX0 pin will not be used as the chip select in this mode.  Data is still read 8 bits at a time, and clocking should be the same, but the "frame" would consist of 40 bits, where the CS(GPIO97) is software toggled.

  • 0 in reply to Daniel Allred
    Prodigy 20 points
    Daniel, thanks for the answer. If I understand right, GPIO[97] is used as chip select signal for the SPI-Flash like FSX0, the timings (Table 11) and the signal polarity (Figure 1) are the same which are shown on page 11 of SPRAAK5A. The reason why I'm asking, we want to use in our application the same SPI-Flash for storing the Boot code of the DSP and additional data of our application. We want to access the SPI-Flash from our application.