Other Parts Discussed in Thread: SYSCONFIG
R5F, PRU_ICSSG/PRU-ICSS/PRU-SS, and M4F remote cores all have region-based address translation (RAT) modules. RAT modules allow a core to translate system addresses (e.g., DDR at 0x8000_0000) to a different local address (e.g., the remote core could write to a local address of 0x90000000, and the RAT could be configured to translate that write to the system address of DDR at 0x8000_0000). M4 cores are most likely cores to need to configure the RAT. However, be aware that the R5F and PRU cores also have RAT functionality.
When would the RAT settings need to be changed? When should the RAT settings NOT be changed? How do I change the RAT settings?
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For information on other multicore subjects, reference the FAQ Sitara multicore development and documentation.
UPDATE January 2024: The information in this FAQ is being added to the processor academy modules. This FAQ will not be maintained going forward.
Please find the latest information in the processor's academy > MCU module > Region-based Address Translation (RAT):
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