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AM3517 NAND Map (PSP-04.02.00.07)

Other Parts Discussed in Thread: AM3517

Hi Everyone,

Yesterday I downloaded AM35x-OMAP35x-LINUX-PSP-04.02.00.07 and I am wondering if x-load, u-boot, and the kernel are in sync with respect to how NAND is partitioned.

For x-load the file .../include/configs/am3517evm.h has the following defines and comments.

/* NAND is partitioned:

 * 0x00000000 - 0x0007FFFF  Booting Image

 * 0x00080000 - 0x0023FFFF  U-Boot Image

 * 0x00240000 - 0x0027FFFF  U-Boot Env Data (X-loader doesn't care)

 * 0x00280000 - 0x0077FFFF  Kernel Image

 * 0x00780000 - 0x08000000  depends on application

 */

#define NAND_UBOOT_START         0x0080000 /* Leaving first 4 blocks for x-load */

#define NAND_UBOOT_END           0x0240000 /* Giving a space of 2 blocks = 256KB

In the u-boot source .../include/configs/am3517_evm.h

#define SMNAND_ENV_OFFSET               0x260000

The User Guide shows something a little different:

+------------+-->0x00000000-> X-loader start
 |            |
 |            |-->0x0007FFFF-> X-loader end  
 |            |-->0x00080000-> U-Boot start
 |            |
 |            |-->0x001BFFFF-> U-Boot end  
 |            |-->0x001C0000-> ENV start
 |            |
 |            |
 |            |-->0x0027FFFF-> ENV end
 |            |-->0x00280000-> Linux Kernel start
 |            |
 |            |
 |            |
 |            |
 |            |-->0x0077FFFF-> Linux Kernel end
 |            |-->0x00780000-> Filesystem start
Forgetting the UG for a moment: There would be no harm necessarily as it would write the environment at 0x260000 which is in the region specified in the X-Load comment.
Is this as it should be?
Thanks,
Ken

  • Its typo mistake in partition table published in User Guide. The environment section on EVM NAND is @ 0x260000 address, we realized this just few days back and User Guide will be corrected accordingly.

     

    Thanks,

    Vaibhav

  • hi vaibhav

    I have attended your seminar in hyderabad few weeks back

    I want to know process for booting hardware(crane board) through nand

    I want to also know how processor is configured to work in any mode

    thank you

  • Thanks. That comment in X-Loader file should be corrected or removed as well. 

  • Please refer to the last section "Flashing NAND" of LAB session, I had NAND boot steps in the LAB session as a backup, but did not get time to cover that part. Also for more details you can refer to the PSP User Guide http://processors.wiki.ti.com/index.php/AM35x-OMAP35x-PSP_04.02.00.07_UserGuide, the NAND interface is mostly generic and should be applicable to Crane board as well.

    As far as your last question is concerned,

    >> I want to also know how processor is configured to work in any mode

    What do you mean by "any mode"? For all supported boot modes and respective sys_boot pin configuration please refer to the TRM "Introduction" section.

    Thanks,

    Vaibhav

  • thank you vaibhav

     

    I have read nand boot process.

    I want to know few more things which are listed below:

    1)Using flash v1.5 how can I write my files on nand do I need jtag to write files on nand? if yes can you please tell which?

    2)There is onchip ROM for AM3517.When booting process starts  ROM code performs basic initialization.So do I have to write some code in ROM for initial booting???(Can you please tell me about this on chip ROM and its programing or any link which can describe more on this)

    3)I asked you about "any processor mode":

    What i mean by this is processor has Program Status Register so in that different register modes are available so do I need to configure them?

    Also processor has different instruction modes :ARM(32 bit),Thumb(16),Jazzel(8 bit)  so do I need to configure this?


    My questions may be silly or wrong but your answers will clear my ideas to understand hardware

     

    Thank you

  • Hi Kumar,

    1) Flash v1.5

    This is simple serial based flashing tool, so you don't need any JTAG based debugger.

    2) On Chip ROM

    ROM is Read Only memory, you can not change it. The implementation and functionality is fixed, and configurable through the boot modes which boot ROM code reads on reset and initialize the device.

    3: ARM instruction set and mode

    This is ARM Cortex-A8 processor, and for all supported features please refer to the link - http://processors.wiki.ti.com/index.php/Cortex-A8

     

    Thanks,

    Vaibhav