TDA4VM: GPIO resource isolation

Hi,

xiuqi huang said:

and my understanding is that the GPIO of the MAIN domain can only be controlled by the core of the MAIN domain, and the WKUP domain GPIO can only be controlled by the core of the WKUP domain

This is an incorrect understanding. The purpose of the different domains is to allow the device to achieve lower power dissipation profiles by allowing the power supplies to unused domains to be completely turned off. This does not imply that when fully powered on, the different domains cannot interact with one another. Section 3.3.1 in the user guide (SPRUIL1C) shows the connectivity between different initiators (such as MCU R5F cores, C66xx cores, etc.) and the different peripherals on the device (such as GPIO, Timer, MMC, I2C, etc.). Specifically, Table 3-18 shows that the MCU R5F can access GPIO0 / GPIO1 and Table 3-22 shows that the Main R5F can access the WKUP GPIO0. 

xiuqi huang said:

More importantly, how can I ensure that GPIOs can only be used by one system at a given time?

Do you need multiple sources controlling the same GPIO module and/or pin in your application? (do you need/want both Linux and RTOS to control GPIO0_71 at different points in time?) My assumption is that you only want one of the code bases / cores to have access. In that case, is your question "how do I prevent Linux (or RTOS) from having access to GPIO0_71?"

Regards,
Kevin

Kevin S said:

"how do I prevent Linux (or RTOS) from having access to GPIO0_71?"

Yes，this is what i want. For example, if linux/RTOS already has access to GPIO0_71,  other systems will be rejected when they try to  control it.  

Thank you for your reply,

Regards,

Huang

Hi,

What I meant to ask is, does simply disabling the GPIO in the Linux device tree (or in RTOS) resolve the issue? Or do you completely want to block access to the GPIO from certain cores?

If you are wanting only a specific initiator (ex: MCU R5 ) to have access to the GPIO, you should be able to use the GPIO peripheral firewall. Please see section 3.3.4.2.1 (Peripheral Firewalls) in SPRUIL1C. The table in that section should give the firewall register base address (ex: GPIO0 = 0x45004000). Privilege IDs for different initiators can be found in section 3.3.4.1.2 (Priv ID and ISC Assignment) in SPRUIL1C. 

From a software implementation perspective, the following app note (section 4) mentions that the SysConfig tool could be used to assign firewalls and integrate it's output with SDKs. 

https://www.ti.com/lit/pdf/spracx6 

Regards,
Kevin

Hi，

I completely want to block access to the GPIO from certain cores.

I will try it as you suggest.

And thank you again for your patience and your great support,

Regards,

Huang