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AM3352: How to skip XIP boot

Ethan Tian
Intellectual 1872 points
Part Number: AM3352
Other Parts Discussed in Thread: OMAPL138

Hi experts

Customers need to switch from the security version of AM3352 to the GP version of AM3352, they need the product to have two modes: normal boot mode (11001) and debug1 boot mode (00101)
Originally on the safe CPU, they have no problem booting with the two methods,However, after changing the GP version, with debug1 mode (realized through an external hardware control switch), they did not connect UART0 and XIP devices, their products could not reach the third boot sequence SPI0, which is the mode they need.
But if the hardware is changed to debug2-00010b, it can automatically go to SPI0 sequence after uart0.

SYSBOOT[4:0]

Boot Mode

Use Case

11001b

SPI0,MMC0,EMAC1,UART0

Normal Boot

00101b

UART0,XIP,SPI0,NANDI2C

Debug1

00010b

UART0,SPI0,NAND,NANDI2C

Debug2

They use GPMC connect to NAND flash, and use as bootloader. I saw this description in TRM.

But even if they clear the data of the first block of NAND flash, the boot still cannot start.

How to skip XIP boot? What is the difference between the HS version and the GP version in boot?

BR

Ethan

  • 0
    TI__Guru 70980 points

    Hello Ethan,
    Do we have JTAG access on board?
    If yes, can we try "attaching" JTAG to the board to pinpoint to which point code is running up to?
    where "attaching" means attach/connect JTAG without target reset.
    Let's use JTAG debugger to find out if SPL starts to run on the board.
    a). if yes, SPL needs to be debugged further to see where lock-up is.
    b). if no, check SYSBOOT[] latched in CM CTRL_STS register @0x44E10040 to see if it is matching SYSBOOT pin configured on the board.
    Best,
    -Hong

  • 0 in reply to Hong Guan64
    TI__Mastermind 29462 points

    Hong, 

    Does AM335x HS device support XIP boot mode?

    I knew OMAPL138 secure device doesn't support XIP boot, that is why I ask.

  • 0 in reply to Tony Tang
    TI__Guru 70980 points

    Hello Tony,
    In some early AM335x Linux SDK, XIP-NOR is supported with "*NOR*_defconf" u-boot build. So in theory XIP-NOR secure boot is feasible on AM335x HS.
    Is the working Debug2 an option for customer?
    Best,
    -Hong

  • 0 in reply to Hong Guan64
    TI__Intellectual 1872 points

    Hi Hong

    They use UART boot to check SYSBOOT pin configuration, and they can see that the bootpin is correctly configured.

    If the HS version also supports XIP boot, why can the XIP boot be skipped on the HS version?

    BR

    Ethan

  • 0 in reply to Ethan Tian
    TI__Guru 70980 points

    Hello Ethan,
    One checkpoint is reading the trace vectors filled by on-chip bootrom code on both GP and HS.
    Refer to AM335x TRM <Table 26-4. Tracing Data> for trace vector addresses, and
    <Table 26-42. Tracing Vectors> for trace vector description, specifically <Memory booting trial #> bits.
    Best,
    -Hong