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TDA4VM: Questions about 16 bit model inference on EVM

Part Number: TDA4VM

Hi,

When we ran the TI_DEVICE_a72_test_dl_algo_host_rt.out with a 16bit model on the EVM(it has been infered and passed on the PC),

the program got stuck like the figure shown below, and we have to manually terminate it after a long-time wait.

The parameters written in the import configuration file are shown in the figure below:

Questions:
1. Why is the model inference passed on the PC, but the result cannot be inferenced on the EVM?

2. Could you please take a look at our config file attached above, do we miss any parameters that cause this program-stuck problem?

3. Which parameters should be included in a config file if I want to import the model into 16bit?

Look forward to your reply!

Regards,

Kong

  • Hi Kong,

        Can you provide more details about which SDK are you using?

    Regards,

    Anshu

  • Hi Anshu,

      The SDK I use is the RTOS SDK8.4.

    Regards,

    Kong

  • Hi Kong,

    It's not obvious what the issue might be from the information you provided. Can you please provide the actual model you are trying out as well as import and infer config files so that I can reproduce the issue?

    Regards,
    Aaron

  • Hi,

         Thank you very much for your reply. Please check the attachment and help me solve the problem. Thanks!

    model+import_config+infer_config.zip

  • Hi,

        The following is the relevant log, please check.

    root@j7-evm:/opt/tidl_test# ./TI_DEVICE_a72_test_dl_algo_host_rt.out s:testvecs/config/infer/public/onnx/byd_infer_lfd_BiSeNetV2_sim_16bit.txt
    
    Processing config file #0 : testvecs/config/infer/public/onnx/byd_infer_lfd_BiSeNetV2_sim_16bit.txt
    Input : dataId=0, name=x, scale=1.000000
    Ouput : dataId=79, name=argmax_0.tmp_0, scale=1.000000
          5670136,      5.407 0xffff4ef2c010
    worstCaseDelay for Pre-emption is 16.5237465
    Network File Read done
    APP: Init ... !!!
    MEM: Init ... !!!
    MEM: Initialized DMA HEAP (fd=4) !!!
    MEM: Init ... Done !!!
    IPC: Init ... !!!
    IPC: Init ... Done !!!
    REMOTE_SERVICE: Init ... !!!
    REMOTE_SERVICE: Init ... Done !!!
       164.966596 s: GTC Frequency = 200 MHz
    APP: Init ... Done !!!
       164.978675 s:  VX_ZONE_INIT:Enabled
       164.978712 s:  VX_ZONE_ERROR:Enabled
       164.978730 s:  VX_ZONE_WARNING:Enabled
       164.990282 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
       164.991322 s:  VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!!
    [C7x_1 ]    165.182643 s: TIDL_initDebugTraceParams Done
    [C7x_1 ]    165.182690 s: Alg Alloc for Layer # -    0
    [C7x_1 ]    165.182711 s: Alg Alloc for Layer # -    1
    [C7x_1 ]    165.182766 s: Alg Alloc for Layer # -    2
    [C7x_1 ]    165.182805 s: Alg Alloc for Layer # -    3
    [C7x_1 ]    165.182843 s: Alg Alloc for Layer # -    4
    [C7x_1 ]    165.182878 s: Alg Alloc for Layer # -    5
    [C7x_1 ]    165.182914 s: Alg Alloc for Layer # -    6
    [C7x_1 ]    165.182952 s: Alg Alloc for Layer # -    7
    [C7x_1 ]    165.183002 s: Alg Alloc for Layer # -    8
    [C7x_1 ]    165.183042 s: Alg Alloc for Layer # -    9
    [C7x_1 ]    165.183078 s: Alg Alloc for Layer # -   10
    [C7x_1 ]    165.183137 s: Alg Alloc for Layer # -   11
    [C7x_1 ]    165.183187 s: Alg Alloc for Layer # -   12
    [C7x_1 ]    165.183235 s: Alg Alloc for Layer # -   13
    [C7x_1 ]    165.183271 s: Alg Alloc for Layer # -   14
    [C7x_1 ]    165.183322 s: Alg Alloc for Layer # -   15
    [C7x_1 ]    165.183364 s: Alg Alloc for Layer # -   16
    [C7x_1 ]    165.183412 s: Alg Alloc for Layer # -   17
    [C7x_1 ]    165.183451 s: Alg Alloc for Layer # -   18
    [C7x_1 ]    165.183486 s: Alg Alloc for Layer # -   19
    [C7x_1 ]    165.183522 s: Alg Alloc for Layer # -   20
    [C7x_1 ]    165.183571 s: Alg Alloc for Layer # -   21
    [C7x_1 ]    165.183609 s: Alg Alloc for Layer # -   22
    [C7x_1 ]    165.183644 s: Alg Alloc for Layer # -   23
    [C7x_1 ]    165.183691 s: Alg Alloc for Layer # -   24
    [C7x_1 ]    165.183725 s: Alg Alloc for Layer # -   25
    [C7x_1 ]    165.183773 s: Alg Alloc for Layer # -   26
    [C7x_1 ]    165.183810 s: Alg Alloc for Layer # -   27
    [C7x_1 ]    165.183857 s: Alg Alloc for Layer # -   28
    [C7x_1 ]    165.183894 s: Alg Alloc for Layer # -   29
    [C7x_1 ]    165.183931 s: Alg Alloc for Layer # -   30
    [C7x_1 ]    165.183972 s: Alg Alloc for Layer # -   31
    [C7x_1 ]    165.184031 s: Alg Alloc for Layer # -   32
    [C7x_1 ]    165.184073 s: Alg Alloc for Layer # -   33
    [C7x_1 ]    165.184109 s: Alg Alloc for Layer # -   34
    [C7x_1 ]    165.184158 s: Alg Alloc for Layer # -   35
    [C7x_1 ]    165.184193 s: Alg Alloc for Layer # -   36
    [C7x_1 ]    165.184241 s: Alg Alloc for Layer # -   37
    [C7x_1 ]    165.184281 s: Alg Alloc for Layer # -   38
    [C7x_1 ]    165.184328 s: Alg Alloc for Layer # -   39
    [C7x_1 ]    165.184370 s: Alg Alloc for Layer # -   40
    [C7x_1 ]    165.184419 s: Alg Alloc for Layer # -   41
    [C7x_1 ]    165.184465 s: Alg Alloc for Layer # -   42
    [C7x_1 ]    165.184514 s: Alg Alloc for Layer # -   43
    [C7x_1 ]    165.184558 s: Alg Alloc for Layer # -   44
    [C7x_1 ]    165.184608 s: Alg Alloc for Layer # -   45
    [C7x_1 ]    165.184661 s: Alg Alloc for Layer # -   46
    [C7x_1 ]    165.184711 s: Alg Alloc for Layer # -   47
    [C7x_1 ]    165.184752 s: Alg Alloc for Layer # -   48
    [C7x_1 ]    165.184791 s: Alg Alloc for Layer # -   49
    [C7x_1 ]    165.184834 s: Alg Alloc for Layer # -   50
    [C7x_1 ]    165.184869 s: Alg Alloc for Layer # -   51
    [C7x_1 ]    165.184922 s: Alg Alloc for Layer # -   52
    [C7x_1 ]    165.184976 s: Alg Alloc for Layer # -   53
    [C7x_1 ]    165.185028 s: Alg Alloc for Layer # -   54
    [C7x_1 ]    165.185066 s: Alg Alloc for Layer # -   55
    [C7x_1 ]    165.185120 s: Alg Alloc for Layer # -   56
    [C7x_1 ]    165.185163 s: Alg Alloc for Layer # -   57
    [C7x_1 ]    165.185200 s: Alg Alloc for Layer # -   58
    [C7x_1 ]    165.185241 s: Alg Alloc for Layer # -   59
    [C7x_1 ]    165.185284 s: Alg Alloc for Layer # -   60
    [C7x_1 ]    165.185329 s: Alg Alloc for Layer # -   61
    [C7x_1 ]    165.185372 s: Alg Alloc for Layer # -   62
    [C7x_1 ]    165.185424 s: Alg Alloc for Layer # -   63
    [C7x_1 ]    165.185479 s: Alg Alloc for Layer # -   64
    [C7x_1 ]    165.185526 s: Alg Alloc for Layer # -   65
    [C7x_1 ]    165.185580 s: Alg Alloc for Layer # -   66
    [C7x_1 ]    165.185636 s: Alg Alloc for Layer # -   67
    [C7x_1 ]    165.185680 s: Alg Alloc for Layer # -   68
    [C7x_1 ]    165.185728 s: Alg Alloc for Layer # -   69
    [C7x_1 ]    165.185770 s: Alg Alloc for Layer # -   70
    [C7x_1 ]    165.185813 s: Alg Alloc for Layer # -   71
    
     Instance created for  testvecs/config/infer/public/onnx/byd_infer_lfd_BiSeNetV2_sim_16bit.txt
    [C7x_1 ]    165.185857 s: Alg Alloc for Layer # -   72
    [C7x_1 ]    165.185893 s: Alg Alloc for Layer # -   73
    [C7x_1 ]    165.185926 s: Alg Alloc for Layer # -   74
    [C7x_1 ]    165.185988 s: Alg Alloc for Layer # -   75
    [C7x_1 ]    165.186052 s: Alg Alloc for Layer # -   76
    
    Processing Cnt :    0, InstCnt :    0 testvecs/config/tidl_models/onnx/byd_net_lfd_BiSeNetV2_sim_16bit.bin!
    [C7x_1 ]    165.186106 s: Alg Alloc for Layer # -   77
    [C7x_1 ]    165.186149 s: Alg Alloc for Layer # -   78
    [C7x_1 ]    165.186188 s: Alg Alloc for Layer # -   79
    [C7x_1 ]    165.186221 s: Alg Alloc for Layer # -   80
    [C7x_1 ]    165.186407 s:
    [C7x_1 ]    165.186421 s: TIDL Memory requiement
    [C7x_1 ]    165.186448 s: MemRecNum , Space     , Attribute ,    SizeinBytes
    [C7x_1 ]    165.186479 s:  0         , DDR       , Persistent,    15208
    [C7x_1 ]    165.186507 s:  1         , DDR       , Persistent,    136
    [C7x_1 ]    165.186536 s:  2         , L1D       , Scratch   ,    16384
    [C7x_1 ]    165.186564 s:  3         , L2        , Scratch   ,    458752
    [C7x_1 ]    165.186592 s:  4         , L3/MSMC   , Scratch   ,    8159232
    [C7x_1 ]    165.186619 s:  5         , DDR       , Persistent,    5621060
    [C7x_1 ]    165.186647 s:  6         , DDR       , Scratch   ,    256
    [C7x_1 ]    165.186675 s:  7         , DDR       , Persistent,    110603000
    [C7x_1 ]    165.186703 s:  8         , DDR       , Scratch   ,    128
    [C7x_1 ]    165.186731 s:  9         , DDR       , Scratch   ,    100592492
    [C7x_1 ]    165.186759 s:  10        , DDR       , Persistent,    5431680
    [C7x_1 ]    165.186787 s:  11        , DDR       , Persistent,    915088
    [C7x_1 ]    165.186814 s:  12        , DDR       , Scratch   ,    533650
    [C7x_1 ]    165.186842 s:  13        , DDR       , Persistent,    8388608
    [C7x_1 ]    165.186877 s: NOTE: Memory requirement in host emulation can be different from the same on EVM
    [C7x_1 ]    165.186914 s:       To get the actual TIDL memory requirement make sure to run on EVM with
    [C7x_1 ]    165.186936 s:       writeTraceLevel = 0
    [C7x_1 ]    165.186945 s:
    [C7x_1 ]    165.188286 s: Alg Init for Layer # -    0 out of   80
    [C7x_1 ]    165.188313 s: Alg Init for Layer # -    1 out of   80
    [C7x_1 ]    165.188397 s: Layer Index 1
    [C7x_1 ]    165.188444 s: Alg Init for Layer # -    2 out of   80
    [C7x_1 ]    165.188517 s: Layer Index 2
    [C7x_1 ]    165.188735 s: Alg Init for Layer # -    3 out of   80
    [C7x_1 ]    165.188813 s: Layer Index 3
    [C7x_1 ]    165.188857 s: Alg Init for Layer # -    4 out of   80
    [C7x_1 ]    165.188962 s: Alg Init for Layer # -    5 out of   80
    [C7x_1 ]    165.189063 s: Alg Init for Layer # -    6 out of   80
    [C7x_1 ]    165.189147 s: Layer Index 6
    [C7x_1 ]    165.189280 s: Alg Init for Layer # -    7 out of   80
    [C7x_1 ]    165.189369 s: Layer Index 7
    [C7x_1 ]    165.189500 s: Alg Init for Layer # -    8 out of   80
    [C7x_1 ]    165.189584 s: Layer Index 8
    [C7x_1 ]    165.189627 s: Alg Init for Layer # -    9 out of   80
    [C7x_1 ]    165.189795 s: Alg Init for Layer # -   10 out of   80
    [C7x_1 ]    165.189904 s: Layer Index 10
    [C7x_1 ]    165.190045 s: Alg Init for Layer # -   11 out of   80
    [C7x_1 ]    165.190177 s: Alg Init for Layer # -   12 out of   80
    [C7x_1 ]    165.190271 s: Layer Index 12
    [C7x_1 ]    165.190403 s: Alg Init for Layer # -   13 out of   80
    [C7x_1 ]    165.190504 s: Alg Init for Layer # -   14 out of   80
    [C7x_1 ]    165.190621 s: Layer Index 14
    [C7x_1 ]    165.190755 s: Alg Init for Layer # -   15 out of   80
    [C7x_1 ]    165.190857 s: Layer Index 15
    [C7x_1 ]    165.190998 s: Alg Init for Layer # -   16 out of   80
    testvecs/input/ti_lindau_I00000.bmp
    [C7x_1 ]    165.191114 s: Layer Index 16
    [C7x_1 ]    165.191247 s: Alg Init for Layer # -   17 out of   80
    [C7x_1 ]    165.191361 s: Alg Init for Layer # -   18 out of   80
    [C7x_1 ]    165.191475 s: Alg Init for Layer # -   19 out of   80
    [C7x_1 ]    165.191560 s: Layer Index 19
    [C7x_1 ]    165.191627 s: Alg Init for Layer # -   20 out of   80
    [C7x_1 ]    165.191752 s: Layer Index 20
    [C7x_1 ]    165.191885 s: Alg Init for Layer # -   21 out of   80
    [C7x_1 ]    165.191998 s: Layer Index 21
    [C7x_1 ]    165.192041 s: Alg Init for Layer # -   22 out of   80
    [C7x_1 ]    165.192264 s: Alg Init for Layer # -   23 out of   80
    [C7x_1 ]    165.192406 s: Layer Index 23
    [C7x_1 ]    165.192474 s: Alg Init for Layer # -   24 out of   80
    [C7x_1 ]    165.192586 s: Alg Init for Layer # -   25 out of   80
    [C7x_1 ]    165.192789 s: Layer Index 25
    [C7x_1 ]    165.192859 s: Alg Init for Layer # -   26 out of   80
    [C7x_1 ]    165.192992 s: Layer Index 26
    [C7x_1 ]    165.193059 s: Alg Init for Layer # -   27 out of   80
    [C7x_1 ]    165.193232 s: Layer Index 27
    [C7x_1 ]    165.193302 s: Alg Init for Layer # -   28 out of   80
    [C7x_1 ]    165.193428 s: Alg Init for Layer # -   29 out of   80
    [C7x_1 ]    165.193561 s: Alg Init for Layer # -   30 out of   80
    [C7x_1 ]    165.193672 s: Layer Index 30
    [C7x_1 ]    165.193724 s: Alg Init for Layer # -   31 out of   80
    [C7x_1 ]    165.193936 s: Layer Index 31
    [C7x_1 ]    165.194012 s: Alg Init for Layer # -   32 out of   80
    [C7x_1 ]    165.194141 s: Layer Index 32
    [C7x_1 ]    165.194184 s: Alg Init for Layer # -   33 out of   80
    [C7x_1 ]    165.194513 s: Alg Init for Layer # -   34 out of   80
    [C7x_1 ]    165.194772 s: Layer Index 34
    [C7x_1 ]    165.194826 s: Alg Init for Layer # -   35 out of   80
    [C7x_1 ]    165.194942 s: Alg Init for Layer # -   36 out of   80
    [C7x_1 ]    165.195469 s: Layer Index 36
    [C7x_1 ]    165.195521 s: Alg Init for Layer # -   37 out of   80
    [C7x_1 ]    165.195681 s: Layer Index 37
    [C7x_1 ]    165.195732 s: Alg Init for Layer # -   38 out of   80
    [C7x_1 ]    165.196125 s: Layer Index 38
    [C7x_1 ]    165.196177 s: Alg Init for Layer # -   39 out of   80
    [C7x_1 ]    165.196300 s: Alg Init for Layer # -   40 out of   80
    [C7x_1 ]    165.196800 s: Layer Index 40
    [C7x_1 ]    165.196854 s: Alg Init for Layer # -   41 out of   80
    [C7x_1 ]    165.197030 s: Layer Index 41
    [C7x_1 ]    165.197080 s: Alg Init for Layer # -   42 out of   80
    [C7x_1 ]    165.197477 s: Layer Index 42
    [C7x_1 ]    165.197530 s: Alg Init for Layer # -   43 out of   80
    [C7x_1 ]    165.197661 s: Alg Init for Layer # -   44 out of   80
    [C7x_1 ]    165.198172 s: Layer Index 44
    [C7x_1 ]    165.198224 s: Alg Init for Layer # -   45 out of   80
    [C7x_1 ]    165.198400 s: Layer Index 45
    [C7x_1 ]    165.198450 s: Alg Init for Layer # -   46 out of   80
    [C7x_1 ]    165.198865 s: Layer Index 46
    [C7x_1 ]    165.198917 s: Alg Init for Layer # -   47 out of   80
    [C7x_1 ]    165.199058 s: Alg Init for Layer # -   48 out of   80
    [C7x_1 ]    165.199148 s: Alg Init for Layer # -   49 out of   80
    [C7x_1 ]    165.199276 s: Layer Index 49
    [C7x_1 ]    165.199320 s: Alg Init for Layer # -   50 out of   80
    [C7x_1 ]    165.199434 s: Alg Init for Layer # -   51 out of   80
    [C7x_1 ]    165.199947 s: Layer Index 51
    [C7x_1 ]    165.200000 s: Alg Init for Layer # -   52 out of   80
    [C7x_1 ]    165.200202 s: Alg Init for Layer # -   53 out of   80
    [C7x_1 ]    165.200342 s: Layer Index 53
    [C7x_1 ]    165.200386 s: Alg Init for Layer # -   54 out of   80
    [C7x_1 ]    165.200506 s: Alg Init for Layer # -   55 out of   80
    [C7x_1 ]    165.201015 s: Layer Index 55
     ----------------------- TIDL Process with TARGET DATA FLOW ------------------------
    [C7x_1 ]    165.201061 s: Alg Init for Layer # -   56 out of   80
    [C7x_1 ]    165.201182 s: Alg Init for Layer # -   57 out of   80
    [C7x_1 ]    165.201274 s: Alg Init for Layer # -   58 out of   80
    [C7x_1 ]    165.201356 s: Layer Index 58
    [C7x_1 ]    165.201402 s: Alg Init for Layer # -   59 out of   80
    [C7x_1 ]    165.201596 s: Layer Index 59
    [C7x_1 ]    165.203046 s: Not enough memory to allocate intMemPtr in MSMC
    [C7x_1 ]    165.203085 s: Warning: Trying to get scratch mem from DDR. Expect performance degradation!
    [C7x_1 ]    165.203120 s: Alg Init for Layer # -   60 out of   80
    [C7x_1 ]    165.203336 s: Layer Index 60
    [C7x_1 ]    165.203381 s: Alg Init for Layer # -   61 out of   80
    [C7x_1 ]    165.203598 s: Layer Index 61
    [C7x_1 ]    165.203733 s: Alg Init for Layer # -   62 out of   80
    [C7x_1 ]    165.203967 s: Layer Index 62
    [C7x_1 ]    165.204099 s: Alg Init for Layer # -   63 out of   80
    [C7x_1 ]    165.204439 s: Layer Index 63
    [C7x_1 ]    165.204483 s: Alg Init for Layer # -   64 out of   80
    [C7x_1 ]    165.205021 s: Layer Index 64
    [C7x_1 ]    165.205156 s: Alg Init for Layer # -   65 out of   80
    [C7x_1 ]    165.205722 s: Layer Index 65
    [C7x_1 ]    165.205855 s: Alg Init for Layer # -   66 out of   80
    [C7x_1 ]    165.206421 s: Layer Index 66
    [C7x_1 ]    165.206468 s: Alg Init for Layer # -   67 out of   80
    [C7x_1 ]    165.206610 s: Alg Init for Layer # -   68 out of   80
    [C7x_1 ]    165.206721 s: Alg Init for Layer # -   69 out of   80
    [C7x_1 ]    165.206819 s: Alg Init for Layer # -   70 out of   80
    [C7x_1 ]    165.207021 s: Alg Init for Layer # -   71 out of   80
    [C7x_1 ]    165.207169 s: Layer Index 71
    [C7x_1 ]    165.207308 s: Alg Init for Layer # -   72 out of   80
    [C7x_1 ]    165.207425 s: Alg Init for Layer # -   73 out of   80
    [C7x_1 ]    165.207515 s: Alg Init for Layer # -   74 out of   80
    [C7x_1 ]    165.208037 s: Layer Index 74
    [C7x_1 ]    165.208174 s: Alg Init for Layer # -   75 out of   80
    [C7x_1 ]    165.208712 s: Layer Index 75
    [C7x_1 ]    165.208850 s: Alg Init for Layer # -   76 out of   80
    [C7x_1 ]    165.208987 s: Layer Index 76
    [C7x_1 ]    165.209120 s: Alg Init for Layer # -   77 out of   80
    [C7x_1 ]    165.209233 s: Alg Init for Layer # -   78 out of   80
    [C7x_1 ]    165.209332 s: Alg Init for Layer # -   79 out of   80
    [C7x_1 ]    165.209409 s: Alg Init for Layer # -   80 out of   80
    [C7x_1 ]    165.209569 s: TIDL_initializeHandleForPreemption is completed
    [C7x_1 ]    166.195793 s: TIDL_process is started with handle : 17578000
    [C7x_1 ]    166.195824 s: TIDL_activate is called with handle : 17578000
    [C7x_1 ]    166.196045 s: Starting Layer # -    1
    [C7x_1 ]    166.196106 s:    0         1.00000         0.00000       255.00000 2
    [C7x_1 ]    166.650443 s: Processing Layer # -    1
    [C7x_1 ]    166.650473 s:
    [C7x_1 ]    166.650484 s: Row Flow
    [C7x_1 ]    166.650541 s: Stride; Fr; Fc;  Ni;  No;   G;bias;  width; height;  pad;   inBlkSize; validColsIn; numMMAcalls;circBufPitch;  coeffPitch;   inChPitch;  outChPitch
    [C7x_1 ]    166.650615 s:      2;  3;  3;   3;  16;   1;  1;   1024;    510;    1;       61500;       31776;          18;      131072;          56;      527875;      132384
    [C7x_1 ]    166.650944 s:    2        38.25299         0.00000      1378.87256 2
    [C7x_1 ]    167.030013 s: End of Layer # -    1 with outPtrs[0] = 7002007c
    [C7x_1 ]    167.030042 s: Starting Layer # -    2
    [C7x_1 ]    167.030062 s: Processing Layer # -    2
    [C7x_1 ]    167.030085 s:
    [C7x_1 ]    167.030096 s: Row Flow
    [C7x_1 ]    167.030153 s: Stride; Fr; Fc;  Ni;  No;   G;bias;  width; height;  pad;   inBlkSize; validColsIn; numMMAcalls;circBufPitch;  coeffPitch;   inChPitch;  outChPitch
    [C7x_1 ]    167.030225 s:      1;  1;  1;  16;   8;   1;  1;    512;    256;    1;        8192;        4096;          33;       16384;          34;      132384;      132384
    [C7x_1 ]    167.030551 s:    3        32.62866         0.00000      1057.13818 2
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  • Hi,

    It looks like there is a bug for the layer that is hanging. A fix for the same should be available in our next SDK release. Also, are you running this model with OSRT? 

    Regards, 
    Aaron

  • Hi,

        We're running on top of a TIDLruntime. I would like to know whether the version of the problem to be fixed is SDK8.5 or SDK8.6?

         Regards,

         Kong

  • Hi Kong,

    The fix for the current layer that is hanging will be available on the 8.6 SDK.

    I noticed your model has an eltwise layer that does vector and tensor additon (picture of layer attached) which is not supported by our TIDL runtime. I would suggest using our Open Source RunTime (OSRT) offering. Please refer to the following repo link:

    github.com/.../edgeai-tidl-tools

    Your model looks like it is using the ONNX v8 format while our OSRT supports ONNX v7 format. You might have to re-export the model to get things working properly (in addition to the above fix).

    Let me know if you face any further issues.

    Regards,
    Aaron

  • Hi,

        Thank you very much for your letter and answer. We look forward to hearing about your version repair. Thank you very much.

         Regards

         Kong

  • Hi,

        By the way, I also want to know the reason for the following problem: If the add layer is not supported, then why the model board side reasoning passed at 8bit?

        Regards

        Kong

  • Hi,

    I highly doubt it was functionally passing. By the looks of it, TIDL interpreted that layer's output as a vector and possibly did an eltwise of a single vector from the tensor with the other vector instead of tensor-vector eltwise. I'm attaching the extract of the layer in your model as well as what TIDL interpreted below. Like I said earlier, we do not support vector-tensor eltwise in our standalone TIDL runtime.

      

    Regards,
    Aaron

  • Hi,

         So what is the workaround of this case?  Do we need to explicity broadcast the vector to a tensor and then feed it into EltWise layer?  We also notice that there is a EltWise layer, which the output is as we expected.  Why does the vertor-tensor Elt work here?  Does it do the same thing as multiplying the tensor by a constant, keeping the same tensor?

         Regards,

         Kong

  • Hi,

        The screenshot of the model is here, please check, thank you!

  • Hi Kong,

    Since we don't support vector-tensor eltwise, the model import is resulting into some indeterminate state where it assumes either vector-vector or tensor-tensor input and proceeds accordingly. In either case, the output of the layer will not functionally match according to your expectation since our TIDL runtime assumes that the inputs of eltwise are of the same dimension.

    That being said, to get things working, you can do one of the following:

    1. Run your model using our OSRT (mentioned earlier).
    2. Rexport the model with the vector broadcasted as a tensor. In this case, you could still run using TIDL-RT.

    Regards,
    Aaron

  • Hi,

       Thank you very much for your patient answer and guidance. We've got the problem figured out on our end. Thank you very much.

       Regards,

       Kong