AM6442: About EXINT and NMI

Hello Hideaki,

Thank you for the query.

Let me review the queries listed and comeback with suggestions or queries i may have.

We may have to separate the queries into multiple threads. hardware and software queries to reach to the right expert faster.

Did you say customer if finalizing the hardware?

Regards,

Sreenivasa

Hi Sreenivasa,

Thank you for your reply. It would be appreciated if we can receive your answer as soon as possible. I think that it would be not so difficult for the right expart to answer these inquiries, because these are questions about the specifications of EXINT and NMI which should be described in the TRM.

Thanks and regards,
Hideaki

Hello Hideaki,

Thank you for the note.

Hideaki Matsumoto said:

I think that it would be not so difficult for the right expart to answer these inquiries, because these are questions about the specifications of EXINT and NMI which should be described in the TRM.

Noted. I have reachecd out to the experts.

My customer has to fix their board design with AM6442 soon. 

You mentioned the above in the query.

Is there some specific query with respect to the board design that could be prioritized and answered.

Regards,

Sreenivasa

Hi Sreenivasa,

Did you get any update from teh experts ?

Regards,
Hideaki

Hello Hideaki,

Thank you for the note and follow-up mail.

I have reached out to the design team and experts for information.

I will update when i receive some inputs.

My customer has to fix their board design with AM6442 soon. 

You mentioned the above in the query.

Is there some specific query with respect to the board design that could be prioritized and answered.

Regards,

Sreenivasa

Hello Hideaki,

I have summarized the inputs i received from the teams.

• Could you share the specification of EXINT ?
• What’s difference of use case between EXINT and other interrupt using GPIO ?
• EXTINT seems to be in MAIN Power domain. Does it interrupt A53 or R5F core ?

EXTINTn is just a dedicated interrupt pin using an open drain buffer. There is no NMI support. EXTINTn connects to GIC (A53 interrupt controller) and VIM (R5 interrupt controller) through an internal inverter. So, from a Pin level, the polarity is fixed at active low for Level interrupt or falling edge triggered for pulse interrupt.

On the EVM, EXTINT is connected to Ethernet PHY. Should they also connect INT of every PHY to EXTINT on their board?
In this use case, is there any concern or caution?
Since the EVM has the configuration, there should be no concern. As i understand the connection to this specific pin is not a requirement.

Do you have any explanation? ex. Block diagram which they can understand a route of interrupt?

I am checking internally. I have not received any inputs and will update you with any inputs i receive.

I will have to assign the below question to the software team as i follow-up on other question. Please start a new thread for the below.

• They can’t find NMI in the TRM. According to the following document, only M4 has NMI, correct ?
• https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/KERNEL_DPL_HWI_PAGE.html
• Which pin can they use in order to interrupt from external to NMI ? How can they configurate this interrupt ?
• How can they set Level, Edge, Priority, etc.. of this interrupt ?

Regards,

Sreenivasa