problem with 256MB DDR2 on DM368

Hongfeng Wang

We used a 128MB chip in previous version board, and everything worked fine.

We just upgraded to a 256MB chip, same bus width,banks,page size, etc, only difference is one extra row address pin.

Now the problem is that if I allocate more than 128MB for kernel in bootargs, Linux will hang right after "booting the kernel".

I can read/write to upper 128MB region in uboot. I don't think it's related to timing, since it works ok if I only use the lower 128MB.

Thanks for your input.

Regards,

Hongfeng

over 14 years ago

0 Hongfeng Wang over 14 years ago

Genius 3925 points

I found the error was traced back to /arch/arm/mach-davinci/include/mach/memory.h

#define MAX_DMA_ADDRESS         (PAGE_OFFSET + (128<<20))

The comments says:
/*
   * Restrict DMA-able region to workaround silicon bug.  The bug
   * restricts buffers available for DMA to video hardware to be
   * below 128M
   */

I want to know if this is still true, how do I get around this if I want to use 256MB memory?
Thanks.

0 Hongfeng Wang over 14 years ago in reply to Hongfeng Wang

Genius 3925 points

Anybody? I am still stuck here.

0 Marko Shink over 14 years ago in reply to Hongfeng Wang

Genius 3475 points

Hi,

Have you already tried to change uBoot(davinci_dm368_ipnc.h) and UBL(device.c) memory settings.

http://e2e.ti.com/support/embedded/f/354/t/118167.aspx

Regards,
Marko.

0 Hongfeng Wang over 14 years ago in reply to Marko Shink

Genius 3925 points

The UBL only sets up the DDR timings etc, I didn't see anywhere related to the chip capacity.

I changed the configuration file in uBoot, so it displays 256MB, but I think it's for display only.

0 Forest Wang over 14 years ago in reply to Hongfeng Wang

Intellectual 315 points

Have you resolve it? could you share how to do?

many thanks

0 Hongfeng Wang over 14 years ago in reply to Forest Wang

Genius 3925 points

It turned out that there's a PCB error on our board, the MSB of the address lines was connected to wrong pin on the SDRAM chip.

So that when I try to write to 88000000, the content of 80000000 are changed as well. That's how I found it out.

0 Nick Kao over 13 years ago in reply to Hongfeng Wang

Prodigy 65 points

Hi,

Is it ok to post the schematic and the DDR2 part name you used for 256MB DDR2 expansion?

thanks!

0 Marcus Clyne over 13 years ago in reply to Hongfeng Wang

Prodigy 20 points

Hi,

It would be good to know what the memory part was that you used for 256MBytes. We're currently looking to do the same thing (upgrade from 128MBytes to 256MBytes), and are going through many many datasheets to check timing etc. Knowing that there is a part out there that works would be great!

Any guidance as to what has worked for you would be appreciated!

0 Chris Richardson77843 over 13 years ago in reply to Marcus Clyne

Intellectual 435 points

Hi Marcus,

We are using a 256MB part here in conjunction with DM368. Note that I had to go through the memory controller registers in UBL in order to set up the timing properly, which was not fun. Here is the part we are using:

http://www.micron.com/parts/dram/ddr2-sdram/mt47h128m16rt-25e-it

Chris

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problem with 256MB DDR2 on DM368