Hi,
Good Day.
We would like to know if the power for DDR_VDDDLL (Power (1.8 Volts) for the DDR2 Digital Locked Loop) pin shall be filtered the same way as recommended in the datasheet "6.7.1 PLL1 and PLL2" for the PLLPWR18 pin:
Please advise. Thank you very much.
Best Regards,
Ray Vincent