TDA4VM: Boot app in MCU10 boot A72 failed

Hi Menghai,

I see the SPI probe is failing. Are you seeing this issue on a custom board or is this a TO EVM. Also, if this is a custom board, can you please confirm if the flash is validated or not

Regards,
Parth

Dear Expert,

     I would like to boot from the eMMC because the u-boot.image is put in the eMMC.And how to select the boot device?

    . Also, if this is a custom board, can you please confirm if the flash is validated or not

    Yes. My board has been validated. And the previous SDK7 has been successfully run with the following log.

U-Boot SPL 2020.01 (Dec 29 2021 - 17:08:10 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0015 '21.1.1--v2021.01a (Terrific Lla')
Reading on-board EEPROM at 0x50 failed 1
Trying to boot from MMC1

U-Boot 2020.01 (Apr 24 2022 - 15:29:52 +0800)

SoC: J721E SR2.0
Model: Texas Instruments K3 J721E SoC
Reading on-board EEPROM at 0x50 failed 1

Dear Expert,

     Now I change the u32 spl_boot_device(void) in arch/arm/mach-k3/j721e_init.c as follows:

    721 u32 spl_boot_device(void)
722 {
723 u32 wkup_devstat = readl(CTRLMMR_WKUP_DEVSTAT);
724 u32 main_devstat;
725
726 if (wkup_devstat & WKUP_DEVSTAT_MCU_OMLY_MASK) {
727 printf("ERROR: MCU only boot is not yet supported\n");
728 return BOOT_DEVICE_RAM;
729 }
730
731 /* MAIN CTRL MMR can only be read if MCU ONLY is 0 */
732 main_devstat = readl(CTRLMMR_MAIN_DEVSTAT);
733 // for sbl-ti-spl-bin-boot emmc u-boo.img
734 #if 1
735 u32 bootmode = __get_primary_bootmedia(main_devstat, wkup_devstat);
736 if((bootmode>=1)&&(bootmode<=3))
737 {
738 return BOOT_DEVICE_MMC1;
739 }
740 #endif
741 if (bootindex == K3_PRIMARY_BOOTMODE)
742 return __get_primary_bootmedia(main_devstat, wkup_devstat);
743 else
744 return __get_backup_bootmedia(main_devstat);
745 }

And the boot device change to MMC1 but still could not jump to the u-boot.img. The log is:

NOTICE: BL31: v2.7(release):v2.7.0-359-g1309c6c805-dirty
NOTICE: BL31: Built : 07:46:16, Dec 18 2022
I/TC:
I/TC: OP-TEE version: 3.19.0 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Sun Dec 18 07:46:21 UTC 2022 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2021.01-dirty (Feb 17 2023 - 09:15:24 +0800)
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed 1
Board: J721EX-PM1-SOM rev E2
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed 1
Trying to boot from MMC1

Is there any porting guide?

Hi,

So even the SBL is booting from eMMC? Can you please comment on what is the boot media that you are using? Why are you required to make the code change for MMC1?

Also have you migrated your code from SDK 7 to the latest?

Best Regards,

Keerthy

Dear Expert，

1. My u-boot.image is put in the eMMC。

2. In order to boot MCU10 quickely, my boot sequence is: SBL-->Boot MCU10 --> Boot App in MCU10 loads and runs u-boot-spl which is loacted at ospi_flash -->u-boot-spl loads and runs u-boot.img which is loacted at eMMC.

3. Now it seems that the BootAPP loads and runs the u-boot-spl successfully but the u-boot-spl loads and runs u-boot.img failed.

4. I add some tracing log to ti-processor-sdk-linux-j7-evm-08_05_00_08\board-support\u-boot-2021.01+gitAUTOINC+7996ed51f1-g7996ed51f1\common\spl\spl_fit.c and the log is as follows.

NOTICE: BL31: v2.7(release):v2.7.0-359-g1309c6c805-dirty
NOTICE: BL31: Built : 07:46:16, Dec 18 2022
I/TC:
I/TC: OP-TEE version: 3.19.0 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Sun Dec 18 07:46:21 UTC 2022 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2021.01-dirty (Feb 20 2023 - 11:05:48 +0800)
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed 1
Board: J721EX-PM1-SOM rev E2
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed 1
board_init_r spl_boot_list[0]=0x11, spl_boot_list[1]=0xdeadbeef, spl_boot_list[2]=0xdeadbeef
boot_from_devices loader->boot_device=0x11 loader->load_image=0x8008334c
Trying to boot from MMC1
spl_load_image MMC1, loader->boot_device=0x11, spl_image->name=
spl_image->load_addr=0x0 spl_image->entry_point=0x0 spl_image->boot_device=0xdeadbeef spl_image->size=0
spl_mmc_load filename=u-boot.img raw_part=0x0 raw_sect=0x1400 bootdev->boot_device=0x11
spl_mmc_load boot_mode=0x3
spl_mmc_load part=0x1
spl_mmc_load err1=0x0
spl_mmc_load mmc boot mode: raw
spl_mmc_load raw_sect=0x1400
mmc_load_image_raw_sector sector=0x1400
mmc_load_image_raw_sector count=0x1400
mmc_load_image_raw_sector image_get_magic=0xd00dfeed
spl_load_simple_fit sector=0x1400
spl_load_simple_fit fit read sector 1400, sectors=4, dst=807ff6c0, count=4, size=0x708
spl_load_simple_fit images=88spl_load_simple_fit node=100spl_load_fit_image sector=5120, base_offset=1800 node=100
spl_load_fit_image step=1
spl_load_fit_image step=2
spl_load_fit_image step=3
spl_load_fit_image step=4
spl_load_fit_image step=5
spl_load_fit_image step=6
External data: dst=70000000, offset=708, size=9bf0
spl_load_fit_image end
spl_load_simple_fit Image OS is ARM Trusted Firmware
spl_load_simple_fit spl_image->os=25spl_load_simple_fit spl_fit_get_image_node node=312 images=88
spl_load_fit_image sector=5120, base_offset=1800 node=312
spl_load_fit_image step=1
spl_load_fit_image step=2
spl_load_fit_image step=3
spl_load_fit_image step=4
spl_load_fit_image step=5
spl_load_fit_image step=6
External data: dst=9e800000, offset=a2f8, size=5e6d0
spl_load_fit_image end
spl_load_simple_fit spl_fit_get_image_node ret=0
spl_load_simple_fit Loadable111111 is Trusted Execution Environment
spl_load_simple_fit spl_fit_image_get_os os_type=26
spl_load_simple_fit spl_fit_get_image_node node=480 images=88
spl_load_fit_image sector=5120, base_offset=1800 node=480
spl_load_fit_image step=1
spl_load_fit_image step=2
spl_load_fit_image step=3
spl_load_fit_image step=4
spl_load_fit_image step=5
spl_load_fit_image step=6
External data: dst=a0000000, offset=689c8, size=2fe28
spl_load_fit_image end
spl_load_simple_fit spl_fit_get_image_node ret=0
spl_load_simple_fit Loadable111111 is Unknown OS
spl_load_simple_fit spl_fit_image_get_os os_type=255
spl_load_simple_fit spl_fit_get_image_node node=660 images=88
spl_load_fit_image sector=5120, base_offset=1800 node=660
spl_load_fit_image step=1
spl_load_fit_image step=2
spl_load_fit_image step=3
spl_load_fit_image step=4
spl_load_fit_image step=5
spl_load_fit_image step=6

5. Attachment is the spl_fit.c traced 

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016 Google, Inc
 * Written by Simon Glass <sjg@chromium.org>
 */

#include <common.h>
#include <errno.h>
#include <fpga.h>
#include <gzip.h>
#include <image.h>
#include <log.h>
#include <malloc.h>
#include <spl.h>
#include <sysinfo.h>
#include <asm/cache.h>
#include <linux/libfdt.h>

DECLARE_GLOBAL_DATA_PTR;

#ifndef CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ
#define CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ (64 * 1024)
#endif

#ifndef CONFIG_SYS_BOOTM_LEN
#define CONFIG_SYS_BOOTM_LEN	(64 << 20)
#endif

__weak void board_spl_fit_post_load(ulong load_addr, size_t length)
{
}

__weak ulong board_spl_fit_size_align(ulong size)
{
	return size;
}

static int find_node_from_desc(const void *fit, int node, const char *str)
{
	int child;

	if (node < 0)
		return -EINVAL;

	/* iterate the FIT nodes and find a matching description */
	for (child = fdt_first_subnode(fit, node); child >= 0;
	     child = fdt_next_subnode(fit, child)) {
		int len;
		const char *desc = fdt_getprop(fit, child, "description", &len);

		if (!desc)
			continue;

		if (!strcmp(desc, str))
			return child;
	}

	return -ENOENT;
}

/**
 * spl_fit_get_image_name(): By using the matching configuration subnode,
 * retrieve the name of an image, specified by a property name and an index
 * into that.
 * @fit:	Pointer to the FDT blob.
 * @images:	Offset of the /images subnode.
 * @type:	Name of the property within the configuration subnode.
 * @index:	Index into the list of strings in this property.
 * @outname:	Name of the image
 *
 * Return:	0 on success, or a negative error number
 */
static int spl_fit_get_image_name(const void *fit, int images,
				  const char *type, int index,
				  const char **outname)
{
	struct udevice *sysinfo;
	const char *name, *str;
	__maybe_unused int node;
	int conf_node;
	int len, i;
	bool found = true;

	conf_node = fit_find_config_node(fit);
	if (conf_node < 0) {
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
		printf("No matching DT out of these options:\n");
		for (node = fdt_first_subnode(fit, conf_node);
		     node >= 0;
		     node = fdt_next_subnode(fit, node)) {
			name = fdt_getprop(fit, node, "description", &len);
			printf("   %s\n", name);
		}
#endif
		return conf_node;
	}

	name = fdt_getprop(fit, conf_node, type, &len);
	if (!name) {
		debug("cannot find property '%s': %d\n", type, len);
		return -EINVAL;
	}

	str = name;
	for (i = 0; i < index; i++) {
		str = strchr(str, '\0') + 1;
		if (!str || (str - name >= len)) {
			found = false;
			break;
		}
	}

	if (!found && CONFIG_IS_ENABLED(SYSINFO) && !sysinfo_get(&sysinfo)) {
		int rc;
		/*
		 * no string in the property for this index. Check if the
		 * sysinfo-level code can supply one.
		 */
		rc = sysinfo_get_fit_loadable(sysinfo, index - i - 1, type,
					      &str);
		if (rc && rc != -ENOENT)
			return rc;

		if (!rc) {
			/*
			 * The sysinfo provided a name for a loadable.
			 * Try to match it against the description properties
			 * first. If no matching node is found, use it as a
			 * node name.
			 */
			int node;
			int images = fdt_path_offset(fit, FIT_IMAGES_PATH);

			node = find_node_from_desc(fit, images, str);
			if (node > 0)
				str = fdt_get_name(fit, node, NULL);

			found = true;
		}
	}

	if (!found) {
		debug("no string for index %d\n", index);
		return -E2BIG;
	}

	*outname = str;
	return 0;
}

/**
 * spl_fit_get_image_node(): By using the matching configuration subnode,
 * retrieve the name of an image, specified by a property name and an index
 * into that.
 * @fit:	Pointer to the FDT blob.
 * @images:	Offset of the /images subnode.
 * @type:	Name of the property within the configuration subnode.
 * @index:	Index into the list of strings in this property.
 *
 * Return:	the node offset of the respective image node or a negative
 *		error number.
 */
static int spl_fit_get_image_node(const void *fit, int images,
				  const char *type, int index)
{
	const char *str;
	int err;
	int node;

	err = spl_fit_get_image_name(fit, images, type, index, &str);
	if (err)
		return err;

	debug("%s: '%s'\n", type, str);

	node = fdt_subnode_offset(fit, images, str);
	if (node < 0) {
		pr_err("cannot find image node '%s': %d\n", str, node);
		return -EINVAL;
	}

	return node;
}

static int get_aligned_image_offset(struct spl_load_info *info, int offset)
{
	/*
	 * If it is a FS read, get the first address before offset which is
	 * aligned to ARCH_DMA_MINALIGN. If it is raw read return the
	 * block number to which offset belongs.
	 */
	if (info->filename)
		return offset & ~(ARCH_DMA_MINALIGN - 1);

	return offset / info->bl_len;
}

static int get_aligned_image_overhead(struct spl_load_info *info, int offset)
{
	/*
	 * If it is a FS read, get the difference between the offset and
	 * the first address before offset which is aligned to
	 * ARCH_DMA_MINALIGN. If it is raw read return the offset within the
	 * block.
	 */
	if (info->filename)
		return offset & (ARCH_DMA_MINALIGN - 1);

	return offset % info->bl_len;
}

static int get_aligned_image_size(struct spl_load_info *info, int data_size,
				  int offset)
{
	data_size = data_size + get_aligned_image_overhead(info, offset);

	if (info->filename)
		return data_size;

	return (data_size + info->bl_len - 1) / info->bl_len;
}

/**
 * spl_load_fit_image(): load the image described in a certain FIT node
 * @info:	points to information about the device to load data from
 * @sector:	the start sector of the FIT image on the device
 * @fit:	points to the flattened device tree blob describing the FIT
 *		image
 * @base_offset: the beginning of the data area containing the actual
 *		image data, relative to the beginning of the FIT
 * @node:	offset of the DT node describing the image to load (relative
 *		to @fit)
 * @image_info:	will be filled with information about the loaded image
 *		If the FIT node does not contain a "load" (address) property,
 *		the image gets loaded to the address pointed to by the
 *		load_addr member in this struct.
 *
 * Return:	0 on success or a negative error number.
 */
static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
			      void *fit, ulong base_offset, int node,
			      struct spl_image_info *image_info)
{
	int offset;
	size_t length;
	int len;
	ulong size;
	ulong load_addr, load_ptr;
	void *src;
	ulong overhead;
	int nr_sectors;
	int align_len = ARCH_DMA_MINALIGN - 1;
	uint8_t image_comp = -1, type = -1;
	const void *data;
	bool external_data = false;
	printf("spl_load_fit_image sector=%d, base_offset=%d node=%d\n", sector, base_offset, node);
	if (IS_ENABLED(CONFIG_SPL_FPGA) ||
	    (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP))) {
		if (fit_image_get_type(fit, node, &type))
			printf("Cannot get image type.\n");
		else
			printf("%s ", genimg_get_type_name(type));
	}

	if (IS_ENABLED(CONFIG_SPL_GZIP)) {
		fit_image_get_comp(fit, node, &image_comp);
		printf("%s ", genimg_get_comp_name(image_comp));
	}
	printf("spl_load_fit_image step=%d\n", 1);
	if (fit_image_get_load(fit, node, &load_addr))
		load_addr = image_info->load_addr;
	printf("spl_load_fit_image step=%d\n", 2);
	if (!fit_image_get_data_position(fit, node, &offset)) {
		external_data = true;
	} else if (!fit_image_get_data_offset(fit, node, &offset)) {
		offset += base_offset;
		external_data = true;
	}
	printf("spl_load_fit_image step=%d\n", 3);
	if (external_data) {
		/* External data */
		if (fit_image_get_data_size(fit, node, &len))
			return -ENOENT;
		printf("spl_load_fit_image step=%d\n", 4);
		/* Dont bother to copy 0 byte data, but warn, though */
		if (!len) {
			printf("%s: Skip load '%s': image size is 0!\n",
				    __func__, fit_get_name(fit, node, NULL));
			return 0;
			}
		printf("spl_load_fit_image step=%d\n", 5);
		load_ptr = (load_addr + align_len) & ~align_len;
		length = len;

		overhead = get_aligned_image_overhead(info, offset);
		nr_sectors = get_aligned_image_size(info, length, offset);
		printf("spl_load_fit_image step=%d\n", 6);
		if (info->read(info,
			       sector + get_aligned_image_offset(info, offset),
			       nr_sectors, (void *)load_ptr) != nr_sectors)
		{
			printf("spl_load_fit_image step=%d\n", 7);
			return -EIO;
		}
		printf("External data: dst=%lx, offset=%x, size=%lx\n",
		      load_ptr, offset, (unsigned long)length);
		src = (void *)load_ptr + overhead;
	} else {
		/* Embedded data */
		if (fit_image_get_data(fit, node, &data, &length)) {
			printf("Cannot get image data/size\n");
			return -ENOENT;
		}
		printf("Embedded data: dst=%lx, size=%lx\n", load_addr,
		      (unsigned long)length);
		src = (void *)data;
	}

#ifdef CONFIG_SPL_FIT_SIGNATURE
	printf("## Checking hash(es) for Image %s ... ",
	       fit_get_name(fit, node, NULL));
	if (!fit_image_verify_with_data(fit, node,
					 src, length))
		return -EPERM;
	puts("OK\n");
#endif

#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
	board_fit_image_post_process(fit, node, &src, &length);
#endif

	if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
		size = length;
		if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
			   src, &size)) {
			printf("Uncompressing error\n");
			return -EIO;
		}
		length = size;
	} else {
		memcpy((void *)load_addr, src, length);
	}

	if (image_info) {
		ulong entry_point;

		image_info->load_addr = load_addr;
		image_info->size = length;

		if (!fit_image_get_entry(fit, node, &entry_point))
			image_info->entry_point = entry_point;
		else
			image_info->entry_point = FDT_ERROR;
	}
	printf("spl_load_fit_image end\n");
	return 0;
}

static int spl_fit_append_fdt(struct spl_image_info *spl_image,
			      struct spl_load_info *info, ulong sector,
			      void *fit, int images, ulong base_offset)
{
	struct spl_image_info image_info;
	int node, ret = 0, index = 0;

	/*
	 * Use the address following the image as target address for the
	 * device tree.
	 */
	image_info.load_addr = spl_image->load_addr + spl_image->size;

	/* Figure out which device tree the board wants to use */
	node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, index++);
	if (node < 0) {
		debug("%s: cannot find FDT node\n", __func__);

		/*
		 * U-Boot did not find a device tree inside the FIT image. Use
		 * the U-Boot device tree instead.
		 */
		if (gd->fdt_blob)
			memcpy((void *)image_info.load_addr, gd->fdt_blob,
			       fdt_totalsize(gd->fdt_blob));
		else
			return node;
	} else {
		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
					 &image_info);
		if (ret < 0)
			return ret;
	}

	/* Make the load-address of the FDT available for the SPL framework */
	spl_image->fdt_addr = (void *)image_info.load_addr;
#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
	if (CONFIG_IS_ENABLED(LOAD_FIT_APPLY_OVERLAY)) {
		void *tmpbuffer = NULL;

		for (; ; index++) {
			node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP,
						      index);
			if (node == -E2BIG) {
				debug("%s: No additional FDT node\n", __func__);
				break;
			} else if (node < 0) {
				debug("%s: unable to find FDT node %d\n",
				      __func__, index);
				continue;
			}

			if (!tmpbuffer) {
				/*
				 * allocate memory to store the DT overlay
				 * before it is applied. It may not be used
				 * depending on how the overlay is stored, so
				 * don't fail yet if the allocation failed.
				 */
				tmpbuffer = malloc(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ);
				if (!tmpbuffer)
					debug("%s: unable to allocate space for overlays\n",
					      __func__);
			}
			image_info.load_addr = (ulong)tmpbuffer;
			ret = spl_load_fit_image(info, sector, fit, base_offset,
						 node, &image_info);
			if (ret < 0)
				break;

			/* Make room in FDT for changes from the overlay */
			ret = fdt_increase_size(spl_image->fdt_addr,
						image_info.size);
			if (ret < 0)
				break;

			ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
							(void *)image_info.load_addr);
			if (ret) {
				pr_err("failed to apply DT overlay %s\n",
				       fit_get_name(fit, node, NULL));
				break;
			}

			debug("%s: DT overlay %s applied\n", __func__,
			      fit_get_name(fit, node, NULL));
		}
		free(tmpbuffer);
		if (ret)
			return ret;
	}
	/* Try to make space, so we can inject details on the loadables */
	ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
	if (ret < 0)
		return ret;
#endif

	return ret;
}

static int spl_fit_record_loadable(const void *fit, int images, int index,
				   void *blob, struct spl_image_info *image)
{
	int ret = 0;
#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
	const char *name;
	int node;

	ret = spl_fit_get_image_name(fit, images, "loadables",
				     index, &name);
	if (ret < 0)
		return ret;

	node = spl_fit_get_image_node(fit, images, "loadables", index);

	ret = fdt_record_loadable(blob, index, name, image->load_addr,
				  image->size, image->entry_point,
				  fdt_getprop(fit, node, "type", NULL),
				  fdt_getprop(fit, node, "os", NULL));
#endif
	return ret;
}

static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
{
#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY) && !defined(CONFIG_SPL_OS_BOOT)
	const char *name = fdt_getprop(fit, noffset, FIT_OS_PROP, NULL);

	if (!name)
		return -ENOENT;

	/*
	 * We don't care what the type of the image actually is,
	 * only whether or not it is U-Boot. This saves some
	 * space by omitting the large table of OS types.
	 */
	if (!strcmp(name, "u-boot"))
		*os = IH_OS_U_BOOT;
	else
		*os = IH_OS_INVALID;

	return 0;
#else
	return fit_image_get_os(fit, noffset, os);
#endif
}

/*
 * Weak default function to allow customizing SPL fit loading for load-only
 * use cases by allowing to skip the parsing/processing of the FIT contents
 * (so that this can be done separately in a more customized fashion)
 */
__weak bool spl_load_simple_fit_skip_processing(void)
{
	return false;
}

int spl_load_simple_fit(struct spl_image_info *spl_image,
			struct spl_load_info *info, ulong sector, void *fit)
{
	int sectors;
	ulong size;
	unsigned long count;
	struct spl_image_info image_info;
	int node = -1;
	int images, ret;
	int base_offset, hsize, align_len = ARCH_DMA_MINALIGN - 1;
	int index = 0;
	int firmware_node;

	/*
	 * For FIT with external data, figure out where the external images
	 * start. This is the base for the data-offset properties in each
	 * image.
	 */
	size = fdt_totalsize(fit);
	size = (size + 3) & ~3;
	size = board_spl_fit_size_align(size);
	base_offset = (size + 3) & ~3;
	printf("spl_load_simple_fit sector=0x%x \n",sector);
	/*
	 * So far we only have one block of data from the FIT. Read the entire
	 * thing, including that first block, placing it so it finishes before
	 * where we will load the image.
	 *
	 * Note that we will load the image such that its first byte will be
	 * at the load address. Since that byte may be part-way through a
	 * block, we may load the image up to one block before the load
	 * address. So take account of that here by subtracting an addition
	 * block length from the FIT start position.
	 *
	 * In fact the FIT has its own load address, but we assume it cannot
	 * be before CONFIG_SYS_TEXT_BASE.
	 *
	 * For FIT with data embedded, data is loaded as part of FIT image.
	 * For FIT with external data, data is not loaded in this step.
	 */
	hsize = (size + info->bl_len + align_len) & ~align_len;
	fit = spl_get_load_buffer(-hsize, hsize);
	sectors = get_aligned_image_size(info, size, 0);
	count = info->read(info, sector, sectors, fit);
	printf("spl_load_simple_fit fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
	      sector, sectors, fit, count, size);

	if (count == 0)
		return -EIO;

	/* skip further processing if requested to enable load-only use cases */
	if (spl_load_simple_fit_skip_processing())
		return 0;

	/* find the node holding the images information */
	images = fdt_path_offset(fit, FIT_IMAGES_PATH);
	if (images < 0) {
		printf("%s: Cannot find /images node: %d\n", __func__, images);
		return -1;
	}
	printf("spl_load_simple_fit images=%d \n", images);

#ifdef CONFIG_SPL_FPGA
	node = spl_fit_get_image_node(fit, images, "fpga", 0);
	if (node >= 0) {
		/* Load the image and set up the spl_image structure */
		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
					 spl_image);
		if (ret) {
			printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
			return ret;
		}

		debug("FPGA bitstream at: %x, size: %x\n",
		      (u32)spl_image->load_addr, spl_image->size);

		ret = fpga_load(0, (const void *)spl_image->load_addr,
				spl_image->size, BIT_FULL);
		if (ret) {
			printf("%s: Cannot load the image to the FPGA\n",
			       __func__);
			return ret;
		}

		puts("FPGA image loaded from FIT\n");
		node = -1;
	}
#endif

	/*
	 * Find the U-Boot image using the following search order:
	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)
	 *   - fall back 'kernel' (e.g. a Falcon-mode OS boot
	 *   - fall back to using the first 'loadables' entry
	 */
	if (node < 0)
		node = spl_fit_get_image_node(fit, images, FIT_FIRMWARE_PROP,
					      0);
#ifdef CONFIG_SPL_OS_BOOT
	if (node < 0)
		node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
#endif
	if (node < 0) {
		printf("could not find firmware image, trying loadables...\n");
		node = spl_fit_get_image_node(fit, images, "loadables", 0);
		/*
		 * If we pick the U-Boot image from "loadables", start at
		 * the second image when later loading additional images.
		 */
		index = 1;
	}
	if (node < 0) {
		printf("%s: Cannot find u-boot image node: %d\n",
		      __func__, node);
		return -1;
	}
	printf("spl_load_simple_fit node=%d \n", node);

	/* Load the image and set up the spl_image structure */
	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
				 spl_image);
	if (ret)
		return ret;

	/*
	 * For backward compatibility, we treat the first node that is
	 * as a U-Boot image, if no OS-type has been declared.
	 */
	if (!spl_fit_image_get_os(fit, node, &spl_image->os))
		printf("spl_load_simple_fit Image OS is %s\n", genimg_get_os_name(spl_image->os));
#if !defined(CONFIG_SPL_OS_BOOT)
	else
		spl_image->os = IH_OS_U_BOOT;
#endif
	printf("spl_load_simple_fit spl_image->os=%d \n", spl_image->os);
	/*
	 * Booting a next-stage U-Boot may require us to append the FDT.
	 * We allow this to fail, as the U-Boot image might embed its FDT.
	 */
	if (spl_image->os == IH_OS_U_BOOT) {
		ret = spl_fit_append_fdt(spl_image, info, sector, fit,
					 images, base_offset);
		if (!IS_ENABLED(CONFIG_OF_EMBED) && ret < 0)
			return ret;
	}

	firmware_node = node;
	/* Now check if there are more images for us to load */
	for (; ; index++) {
		uint8_t os_type = IH_OS_INVALID;

		node = spl_fit_get_image_node(fit, images, "loadables", index);
		printf("spl_load_simple_fit spl_fit_get_image_node node=%d images=%d\n", node, images);
		if (node < 0)
			break;

		/*
		 * if the firmware is also a loadable, skip it because
		 * it already has been loaded. This is typically the case with
		 * u-boot.img generated by mkimage.
		 */
		if (firmware_node == node)
			continue;

		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
					 &image_info);
		if (ret < 0)
			continue;

		if (!spl_fit_image_get_os(fit, node, &os_type))
			printf("spl_load_simple_fit Loadable111111 is %s\n", genimg_get_os_name(os_type));
		printf("spl_load_simple_fit spl_fit_image_get_os os_type=%d\n", os_type);
		if (os_type == IH_OS_U_BOOT) {
			spl_fit_append_fdt(&image_info, info, sector,
					   fit, images, base_offset);
			spl_image->fdt_addr = image_info.fdt_addr;
		}

		/*
		 * If the "firmware" image did not provide an entry point,
		 * use the first valid entry point from the loadables.
		 */
		if (spl_image->entry_point == FDT_ERROR &&
		    image_info.entry_point != FDT_ERROR)
			spl_image->entry_point = image_info.entry_point;

		/* Record our loadables into the FDT */
		if (spl_image->fdt_addr)
			spl_fit_record_loadable(fit, images, index,
						spl_image->fdt_addr,
						&image_info);
	}
	printf("spl_load_simple_fit111 spl_image->name=%s\n",spl_image->name);
	printf("1111 spl_image->load_addr=0x%x spl_image->entry_point=0x%x spl_image->boot_device=%d spl_image->size=%d\n",spl_image->load_addr,spl_image->entry_point,spl_image->boot_device, spl_image->size);


	/*
	 * If a platform does not provide CONFIG_SYS_UBOOT_START, U-Boot's
	 * Makefile will set it to 0 and it will end up as the entry point
	 * here. What it actually means is: use the load address.
	 */
	if (spl_image->entry_point == FDT_ERROR || spl_image->entry_point == 0)
		spl_image->entry_point = spl_image->load_addr;

	spl_image->flags |= SPL_FIT_FOUND;

#ifdef CONFIG_IMX_HAB
	board_spl_fit_post_load((ulong)fit, size);
#endif
	printf("spl_load_simple_fit spl_image->name=%s\n",spl_image->name);
	printf("spl_image->load_addr=0x%x spl_image->entry_point=0x%x spl_image->boot_device=%d spl_image->size=%d\n",spl_image->load_addr,spl_image->entry_point,spl_image->boot_device, spl_image->size);
	return 0;
}

6. I have migrated the .c ,.h and j721e_evm_a72_defconfig files changed to the SDK8.But I found that the sdk8 is different form sdk7 so much and I am not sure to sync all the otherr files. 

Could you help me?

It finally enter  info->read and have no returrn.

Dear Expert,

     Thank you.

     I have found the cause that there was no u-boot.img in the emmc.

Dear Expert,

      I jumped to the Uboot but it seemed crashed.Here is the log. Could you help me?

NOTICE: BL31: v2.7(release):v2.7.0-359-g1309c6c805-dirty
NOTICE: BL31: Built : 07:46:16, Dec 18 2022
I/TC:
I/TC: OP-TEE version: 3.19.0 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Sun Dec 18 07:46:21 UTC 2022 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2021.01 (Mar 01 2023 - 17:56:14 +0800)
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -19
Board: J721EX-PM1-SOM rev E2
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.5.2--v08.05.02 (Chill Capybar')
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -19
Trying to boot from MMC1

U-Boot 2021.01 (Mar 01 2023 - 17:56:14 +0800)

SoC: J721E SR1.1 GP
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -19
Board: J721EX-PM1-SOM rev E2
DRAM: 4 GiB
idle-statesFlash:
ERROR: Unhandled External Abort received on 0x80000000 from EL2
ERROR: exception reason=0 syndrome=0xbf000002
Unhandled Exception from EL2
x0 = 0x00000000fded6990
x1 = 0x0000000000000000
x2 = 0x0000000000000019
x3 = 0x0000000500000000
x4 = 0x00000000fff1c6cc
x5 = 0x0000000000000000
x6 = 0x0000000000000008
x7 = 0x0000000000000002
x8 = 0x00000000fded6a10
x9 = 0x0000000000000008
x10 = 0x0000000000000004
x11 = 0x0000000000000002
x12 = 0x0000000000000b38
x13 = 0x00000000fdebb2ec
x14 = 0x00000000fdebb550
x15 = 0x0000000000000002
x16 = 0x00000000fff37b68
x17 = 0x0000000000000000
x18 = 0x00000000fded0df0
x19 = 0x00000000fded2470
x20 = 0x0000000000000000
x21 = 0x00000000fded6990
x22 = 0x00000000800bb498
x23 = 0x00000000800b391f
x24 = 0x00000000800b3907
x25 = 0x00000000deadbeef
x26 = 0x0000000000000005
x27 = 0x0000000000000000
x28 = 0x0000000000000000
x29 = 0x00000000fdebb3e0
x30 = 0x00000000fff255cc
scr_el3 = 0x000000000000073d
sctlr_el3 = 0x0000000030cd183f
cptr_el3 = 0x0000000000000000
tcr_el3 = 0x0000000080803520
daif = 0x00000000000002c0
mair_el3 = 0x00000000004404ff
spsr_el3 = 0x00000000200002c9
elr_el3 = 0x00000000fff25630
ttbr0_el3 = 0x0000000070011cc0
esr_el3 = 0x00000000bf000002
far_el3 = 0x0000000000000000
spsr_el1 = 0x0000000000000000
elr_el1 = 0x0000000000000000
spsr_abt = 0x0000000000000000
spsr_und = 0x0000000000000000
spsr_irq = 0x0000000000000000
spsr_fiq = 0x0000000000000000
sctlr_el1 = 0x0000000030d00801
actlr_el1 = 0x0000000000000000
cpacr_el1 = 0x0000000000000000
csselr_el1 = 0x0000000000000000
sp_el1 = 0x0000000000000000
esr_el1 = 0x0000000000000000
ttbr0_el1 = 0x0000000000000000
ttbr1_el1 = 0x0000000000000000
mair_el1 = 0x0000000000000000
amair_el1 = 0x0000000000000000
tcr_el1 = 0x0000000000800080
tpidr_el1 = 0x0000000000000000
tpidr_el0 = 0x0000000000000000
tpidrro_el0 = 0x0000000000000000
par_el1 = 0x0000000000000000
mpidr_el1 = 0x0000000080000000
afsr0_el1 = 0x0000000000000000
afsr1_el1 = 0x0000000000000000
contextidr_el1 = 0x0000000000000000
vbar_el1 = 0x0000000000000000
cntp_ctl_el0 = 0x0000000000000000
cntp_cval_el0 = 0x0000000000000000
cntv_ctl_el0 = 0x0000000000000000
cntv_cval_el0 = 0x0000000000000000
cntkctl_el1 = 0x0000000000000000
sp_el0 = 0x000000007000b380
isr_el1 = 0x0000000000000000
dacr32_el2 = 0x0000000000000000
ifsr32_el2 = 0x0000000000000000
cpuectlr_el1 = 0x0000001b00000040
cpumerrsr_el1 = 0x0000000000000000
l2merrsr_el1 = 0x0000000000000000

Hi,

Seems like some un-initialized module is being accessed and that is causing a crash. Can you use debugger to check where the crash happens?

Try disabling PCIe, USB, networking nodes from DT.

Best Regards,
Keerthy

Dear Expert,

  It seems to not found the emmc flash. 

U-Boot 2021.01 (Mar 02 2023 - 15:43:41 +0800)

SoC: J721E SR1.1 GP
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -19
Board: J721EX-PM1-SOM rev E2
DRAM: 4 GiB
mmio_mux_probe start>>>>>>>>>>>>>>>>>>>>>>>mux@4080idle-state>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>mmio_mux_probe start>>>>>>>>>>>>>>>>>>>>>>>mux-controller@4000Flash:
ERROR: Unhandled External Abort received on 0x80000000 from EL2
ERROR: exception reason=0 syndrome=0xbf000002
Unhandled Exception from EL2

Menghai Zhao said:

Reading on-board EEPROM at 0x51 failed -19
Trying to boot from MMC1

This seems to suggest that you are booting the u-boot-spl from eMMC aka MMC1. What is in the OSPI flash? To begin with what's the boot mode that you use to boot SBL?

Regards,

Keerthy

Dear Expert,

    I have transformed u-boot-spl.bin to u-boot-spl.appimage which is located in the ospiflash and loaded by MCU10_APP. Then the u-boot.img is located in the emmc.

    I used the OSPIFLash to boot my SBL.

Hi,

That will definitely cause issues. The boot mode you have set is OSPI. So SBL & U-Boot-SPL are coming up correctly as the boot mode is OSPI and the
binaries are in OSPI. The U-Boo.img is located in eMMC. I fail to understand how you are getting the prints below:

Menghai Zhao said:

Trying to boot from MMC1

As you are booting the u-boot-spl from the OPSI and not from MMC1(eMMC). Is that a code change that you have done?

- Keerthy

Dear Expert,

    I add more log and found it crashed when initializing the flash. I have booted tall the R cores before booting the A72.

U-Boot 2021.01 (Mar 06 2023 - 10:47:28 +0800)

uclass_first_device id=0x5d
uclass_first_device ret=0x0 dev=0x804785d0
uclass_first_device dev->name=sysreset-controller
uclass_first_device step=0x1
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=sysreset-controller
SoC: uclass_first_device id=0x55
uclass_first_device ret=0x0 dev=0x804786a0
uclass_first_device dev->name=chipid@43000014
uclass_first_device step=0x1
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=chipid@43000014
J721E SR1.1 GP
Model: Texas Instruments K3 J721E SoC
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=power-controller
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=i2c@42120000
EEPROM not available at 0x50, trying to read at 0x51
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=i2c@42120000
Reading on-board EEPROM at 0x51 failed 1
Board: J721EX-PM1-SOM rev E2
DRAM: 4 GiB
uclass_first_device id=0x55
uclass_first_device ret=0x0 dev=0xfdec58c0
uclass_first_device dev->name=chipid@43000014
uclass_first_device step=0x1
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=chipid@43000014
uclass_first_device id=0x55
uclass_first_device ret=0x0 dev=0xfdec58c0
uclass_first_device dev->name=chipid@43000014
uclass_first_device step=0x1
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=chipid@43000014
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
mmio_mux_probe start>>>>>>>>>>>>>>>>>>>>>>>mux@4080
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=scm-conf@100000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
mmio_mux_probe start>>>>>>>>>>>>>>>>>>>>>>>mux-controller@4000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=scm-conf@100000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=mailbox@32c00000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=mailbox@32c00000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=audi-ext-refclk2-pins-default
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=clocks
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=power-controller
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=serial@2800000
Flash: flash_init start:CONFIG_SYS_MAX_FLASH_BANKS=1
flash_init step=1
cfi_flash_init_dm start
uclass_first_device id=0x37
uclass_first_device ret=0x0 dev=0xfdec6740
uclass_first_device dev->name=hyperbus@47034000
uclass_first_device step=0x1
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=pinctrl@4301c000
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=mcu-fss0-hpb0-pins-default
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=power-controller
uclass_get_device_tail step=1
uclass_get_device_tail step=2
uclass_get_device_tail step=3 ret=0
uclass_get_device_tail dev->name=clocks

ERROR: Unhandled External Abort received on 0x80000000 from EL2
ERROR: exception reason=0 syndrome=0xbf000002
Unhandled Exception from EL2
x0 = 0x00000000fdecbc90
x1 = 0x0000000000000000
x2 = 0x0000000000000019
x3 = 0x0000000500000000

Hi,

Can you disable the flash node?

By default this node is disabled. Do you need this in U-Boot?

I believe the above code is detecting hyperflash. Can you delete that function?

- Keerthy

Yes , I have chang the code in j721e_init.c:

Hi, which files should i disable it?

Hi,Keerthy

    I disbale the config but it doesn't work.

   Only could I return directly then i works.

Dear Expert,

    Now I sucessfully boot the A72 using the tisdk-default-image-j7-evm.tar.xz in the ti-processor-sdk-linux-j7-evm-08_05_00_08\filesystem. And the system is blocked with the following log. I find no log as "A start job" in the ti-processor-sdk-linux-j7-evm-08_05_00_08 and have no idea. Could you help me?

[ 7.493567] systemd[1]: Mounting /opt/diag...
[ 7.509801] EXT4-fs (mmcblk0p16): recovery complete
Mounting /opt/diag...
[ 7.520911] EXT4-fs (mmcblk0p16): mounted filesystem with ordered data mode. Opts: (null)
[ 7.537369] ext4 filesystem being mounted at /opt/data supports timestamps until 2038 (0x7fffffff)
[ 7.548840] systemd[1]: Mounting /opt/log...
[ 7.563584] EXT4-fs (mmcblk0p18): recovery complete
Mounting /opt/log...
[ 7.576960] EXT4-fs (mmcblk0p18): mounted filesystem with ordered data mode. Opts: (null)
[ 7.597020] ext4 filesystem being mounted at /opt/diag supports timestamps until 2038 (0x7fffffff)
[ 7.614402] systemd[1]: Mounting /opt/thirddata...
[ 7.633525] EXT4-fs (mmcblk0p19): recovery complete
[ 7.646545] EXT4-fs (mmcblk0p19): mounted filesystem with ordered data mode. Opts: (null)
[ 7.657105] EXT4-fs (mmcblk0p20): recovery complete
[ 7.657113] EXT4-fs (mmcblk0p20): mounted filesystem with ordered data mode. Opts: (null)
[ 7.657128] ext4 filesystem being mounted at /opt/thirddata supports timestamps until 2038 (0x7fffffff)
Mounting /opt/thirddata...
[ 7.735474] systemd[1]: Mounting /opt/thirdpart...
Mounting /opt/thirdpart...
[ 7.756465] systemd[1]: Mounted /opt/container.
[ 7.761856] EXT4-fs (mmcblk0p21): recovery complete
[ OK ] Mounted /opt/container.
[ 7.772894] EXT4-fs (mmcblk0p21): mounted filesystem with ordered data mode. Opts: (null)
[ 7.785414] systemd[1]: Mounted /opt/data.
[ 7.796960] ext4 filesystem being mounted at /opt/thirdpart supports timestamps until 2038 (0x7fffffff)
[ OK ] Mounted /opt/data.
[ 7.841113] systemd[1]: Mounted /opt/diag.
[ OK ] Mounted /opt/diag.
[ 7.861635] systemd[1]: Mounted /opt/log.
[ OK ] Mounted /opt/log.
[ 7.877457] systemd[1]: Mounted /opt/thirddata.
[ OK ] Mounted /opt/thirddata.
[ 7.893533] systemd[1]: Mounted /opt/thirdpart.
[ OK ] Mounted /opt/thirdpart.
[ 8.679088] systemd[1]: Created slice system-systemd\x2dfsck.slice.
[ OK ] Created slice system-systemd\x2dfsck.slice.
[ 9.004045] systemd[1]: Found device /dev/mmcblk1p2.
[ OK ] Found device /dev/mmcblk1p2.
[ 9.041868] systemd[1]: Starting File System Check on /dev/mmcblk1p2...
Starting File System Check on /dev/mmcblk1p2...
[ 9.319605] systemd[1]: Found device /dev/mmcblk1p1.
[ OK ] Found device /dev/mmcblk1p1.
[ 9.331253] systemd[1]: Starting File System Check on /dev/mmcblk1p1...
Starting File System Check on /dev/mmcblk1p1...
[ 9.755079] systemd[1]: Started File System Check on /dev/mmcblk1p1.
[ OK ] Started File System Check on /dev/mm[ 9.767499] systemd[1]: Mounting /run/media/mmcblk1p1...
cblk1p1.
Mounting /run/media/mmcblk1p1...
[ 9.832739] systemd[1]: Mounted /run/media/mmcblk1p1.
[ OK ] Mounted /run/media/mmcblk1p1.
[ 10.203078] random: crng init done
[ 10.206507] random: 7 urandom warning(s) missed due to ratelimiting
[ 14.146101] systemd[1]: Started File System Check on /dev/mmcblk1p2.
[ OK ] Started File System Check on /dev/mmcblk1p2.
[ 14.175965] systemd[1]: Mounting /run/media/mmcblk1p2...
Mounting /run/media/mmcblk1p2...
[ 14.228942] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[ 14.245239] systemd[1]: Mounted /run/media/mmcblk1p2.
[ OK ] Mounted /run/media/mmcblk1p2.
[ *** ] A start job is running for Bind mou…volatile /var/lib (29s / no limit)
[ ***] A start job is running for Bind mou…ile /var/lib (1min 17s / no limit)

Hi,

Your file system is in eMMC or the SD card?

If it's in the eMMC then we need to change the bbootargs at U-Boot. 

Best Regards,

Keerthy

HI,Keerrthy,

      Both eMMC and SD card would encounter this issue.

Can you share the bootargs that you are using? Also can you wait for 5 minutes to check if the below job ends & we get to kernel prompt?

Menghai Zhao said:

[ *** ] A start job is running for Bind mou…volatile /var/lib (29s / no limit)

- Keerthy

The bootargs is as below.

chosen {
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};

The log will not terminate.

[  *** ] A start job is running for Bind mou…/var/lib (3h 21min 55s / no limit)

Dear Expert,

      Could you help me?

     Here is the env in the uboot

=> env print
addr_fit=0x90000000
arch=arm
args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 ${mtdparts}
args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype}
args_ufs=setenv devtype scsi;setenv bootpart 1:1;run ufs_finduuid;setenv bootargs console = ${console} ${optargs}root=PARTUUID=${uuid} rw rootfstype=${scsirootfstype};setenv devtype scsi;setenv bootpart 1:1
baudrate=115200
board=j721e
board_name=J721EX-PM2-SOM
board_rev=unknown
board_serial=unknown
board_software_revision=unknown
boot=mmc
boot_fdt=try
boot_fit=0
boot_rprocs=if test ${dorprocboot} -eq 1 && test ${boot} = mmc; then rproc init;run boot_rprocs_mmc;fi;
boot_rprocs_mmc=env set rproc_id;env set rproc_fw;env set secure_suffix;if test ${boot_fit} -eq 1; then env set secure_suffix -sec;fi;for i in ${rproc_fw_binaries}; do if test -z "${rproc_id}" ; then env set rproc_id $i;else env set rproc_fw $i${secure_suffix};run rproc_load_and_boot_one;env set rproc_id;env set rproc_fw;fi;done
bootcmd=sf probe; run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern
bootdelay=2
bootdir=/boot
bootenvfile=uEnv.txt
bootm_size=0x10000000
bootpart=0:2
bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr}
console=ttyS2,115200n8
cpu=armv8
default_device_tree=k3-j721e-common-proc-board.dtb
dfu_alt_info_emmc=rawemmc raw 0 0x800000 mmcpart 1;rootfs part 0 1 mmcpart 0;tiboot3.bin.raw raw 0x0 0x400 mmcpart 1;tispl.bin.raw raw 0x400 0x1000 mmcpart 1;u-boot.img.raw raw 0x1400 0x2000 mmcpart 1;u-env.raw raw 0x3400 0x100 mmcpart 1;sysfw.itb.raw raw 0x3600 0x800 mmcpart 1
dfu_alt_info_mmc=boot part 1 1;rootfs part 1 2;tiboot3.bin fat 1 1;tispl.bin fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1;sysfw.itb fat 1 1
dfu_alt_info_ospi=tiboot3.bin raw 0x0 0x080000;tispl.bin raw 0x080000 0x200000;u-boot.img raw 0x280000 0x400000;u-boot-env raw 0x680000 0x020000;sysfw.itb raw 0x6c0000 0x100000;rootfs raw 0x800000 0x3800000
dfu_alt_info_ram=tispl.bin ram 0x80080000 0x200000;u-boot.img ram 0x81000000 0x400000
dorprocboot=0
dtboaddr=0x89000000
envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi;
fdt_addr_r=0x88000000
fdtaddr=0x88000000
fdtcontroladdr=fdeb0c70
fdtoverlay_addr_r=0x80200000
findfdt=setenv name_fdt ${default_device_tree};if test $board_name = J721EX-PM1-SOM; then setenv name_fdt k3-j721e-proc-board-tps65917.dtb; fi;if test $board_name = j721e; then setenv name_fdt k3-j721e-common-proc-board.dtb; fi;if test $board_name = j721e-eaik || test $board_name = j721e-sk; then setenv name_fdt k3-j721e-sk.dtb; fi;setenv fdtfile ${name_fdt}
finduuid=part uuid mmc 0:3 uuid
get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
get_fdt_ufs=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
get_fit_mmc=load mmc ${bootpart} ${addr_fit} ${bootdir}/${name_fit}
get_kern_mmc=load mmc ${bootpart} ${loadaddr} ${bootdir}/${name_kern}
get_kern_ufs=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${name_kern}
get_overlay_mmc=fdt address ${fdtaddr};fdt resize 0x100000;for overlay in $name_overlays;do;load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && fdt apply ${dtboaddr};done;
get_overlay_ufs=fdt address ${fdtaddr};fdt resize 0x100000;for overlay in $name_overlays;do;load scsi ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && fdt apply ${dtboaddr};done;
get_overlaystring=for overlay in $name_overlays;do;setenv overlaystring ${overlaystring}'#'${overlay};done;
importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize}
init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;gpio clear gpio@22_16
init_mmc=run args_all args_mmc
init_ufs=ufs init; scsi scan; run args_ufs
kernel_addr_r=0x82000000
loadaddr=0x82000000
loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
loglevel=3
main_cpsw0_qsgmii_phyinit=if test $board_name = J721EX-PM1-SOM || test $board_name = J721EX-PM2-SOM || test $board_name = j721e; then do_main_cpsw0_qsgmii_phyinit=1; else do_main_cpsw0_qsgmii_phyinit=0; fi;if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then run init_main_cpsw0_qsgmii_phy;fi;
mmcboot=mmc dev ${mmcdev}; devnum=${mmcdev}; devtype=mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run args_mmc; if test ${boot_fit} -eq 1; then run run_fit; else run mmcloados;fi;fi;fi;
mmcdev=1
mmcloados=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi;
mmcrootfstype=ext4 rootwait
mtdids=nor0=47040000.spi.0,nor0=47034000.hyperbus
mtdparts=mtdparts=47040000.spi.0:768k(ospi.TI_SOC_SBL),128k(ospi.TI_SOC_CFG),128k(ospi.TI_SOC_RES),512K(ospi.TI_SOC_ATF),512k(ospi.TI_SOC_SYSFW),1m(ospi.MCU10_SAFTY_BOOT),4m(ospi.MCU10_APP_A),4m(ospi.MCU10_APP_B),1m(ospi.A72_UBOOT),4m(ospi.A72_KERNEL_A),4m(ospi.A72_KERNEL_B),4m(ospi.MCU3021_APP_A),4m(ospi.MCU3021_APP_B),7m(ospi.MCU20_APP_A),7m(ospi.MCU20_APP_B),4m(ospi.MCU31_APP_A),4m(ospi.MCU31_APP_B),4m(ospi.FLS1_BLOCK_A),4m(ospi.FLS2_BLOCK_A),4m(ospi.FLS3_BLOCK_A),1920k(ospi.FLS4_BLOCK_A),128k(ospi.FLS5_BLOCK_A),4m(ospi.DSP_C66_0_APP_A),4m(ospi.DSP_C66_0_APP_B),4m(ospi.DSP_C66_1_APP_A),4m(ospi.DSP_C66_1_APP_B),6m(ospi.DSP_C71_APP_A),6m(ospi.DSP_C71_APP_B)
name_fit=fitImage
name_kern=Image
partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
pxefile_addr_r=0x80100000
ramdisk_addr_r=0x88080000
rd_spec=-
rdaddr=0x88080000
rootfspart=0:3
rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
rproc_load_and_boot_one=if load mmc ${bootpart} $loadaddr ${rproc_fw}; then if rproc load ${rproc_id} ${loadaddr} ${filesize}; then rproc start ${rproc_id};fi;fi
run_fit=bootm ${addr_fit}#${fdtfile}${overlaystring}
run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
scriptaddr=0x80000000
scsirootfstype=ext4 rootwait
serial#=0000000000000000
soc=k3
stderr=serial@2800000
stdin=serial@2800000
stdout=serial@2800000
ufs_finduuid=part uuid scsi ${bootpart} uuid
update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}
vendor=ti

Environment size: 6883/131067 bytes

Hi,

I have two suggestions:

1. Disable loading any remote cores, just boot Linux first and then bring in the remote cores such as R5F/C6x/C7x.
2. Use a tiny filesystem instead of the tisdk-default-image.

If you haven't already tried this, can this be attempted and can you share the logs?

Regards
Karthik