We have a custom board on which we use the TMS320C6678 Chip. On the network side i.e SGMII side we have a 88E1512 Chip which is configured to be SGMII and the copper side of that goes to an ARM processor.
The C6678 is programmed (using the BOOTMODE controlled by the fpga) to boot from i2c eeprom which can be programmed using a header.
On bootup, the C6678 can be seen on the serial port and it comes up all the way and when configured for tftp mode we do not see any traffic going over to the ARM which is TFTP server.
We have a clock 156.25 going as the SGMII clock going into the C6678. The CORECLK is 100Mhz, DDRCLK is 66.67, SRIOSGMIICLK is 156.25. The SGMII port being used is Port 1. Port 2 is tied to ground.
From table 2-24, page 38 of SPRS691 (Multicode Fixed and Floating-Point DSP) document, the value for the NET_PLL is configured to be PLLD=4 and PLLM=63
The Diagnostics done so far
1. We dump the statistics from STATS from the STATS Module (A and B) and we see Packets coming into Port 0 on the Gbe Switch and TX on the SGMII Port 0. No Receives and no errors either in Tx or Rx side of the SGMII Port 0.
P.S We have another board with the C6654 in a same setup and that seems to work fine.
2. If we put the SGMII Control Register (Table 3-10, SPRUGV9D) in loopback. We see the tftp packets being out of the dsp coming back. The packets are all 68 bytes in length and the assumption here is that the packets are ARP packets.
3. We put register SGMII_SERDES_CFGRX and SGMII_SERDES_CFGTX register (Table 3-174, 3-176 SPRUGV9D) in loopback then we packets coming back.
4. We put the 88E1512 SGMII System side in loopback (Page 1, Register 16, bits 8 and 12 were set to 1). Nothing is received on the DSP side.
5. From the DSP we can dump the MDIO registers of the 88E1512 and that shows up. We dumped Register 1, 2 and 3. Register 2 and 3 showed as 0x141 and 0xdd1 which is correct. Register 1 shows up as 0x796D which indicates that the link is up and is at 1G.
6. The SGMII_SERDES_STS (Table 3-170, SPRUGV9D) shows SGMII SerDes is locked and there is no LOS for Port 0. SYNC0(Comma Alignment) sometimes show 0 and sometimes 1.
7. If the 88E1512 is put into loopback on the Copper Side and packets are sent from the ARM. We see the packets coming back.
We have tried reset sequences of the PHY based on some other questions/answers. None of that helped.
Any help would be greatly appreciated.
