This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Does the flash ememory on the DM3730 EVM have to programmed via JTAG when using CCS? Please advise if there are serial methods available and where documentation for this procedure can be found, thank you.
Paul:
You can download our flash tool here.
http://processors.wiki.ti.com/index.php/Flash_v1.6_User_Guide#Installation_Instructions
It is also available from ti.com from the product folders, but that has not been updated to
v1.6 yet.
Regards,
Michael T
PS: Please mark this post as answered via the Verify Answer button below if you think it answers your question. Thanks!
Paul:
Flash tool performs all of these operations as described in user guide:
http://processors.wiki.ti.com/index.php/Flash_v1.6_User_Guide
It can use either USB or UART peripheral boot, so system does not require
other means of booting, such as SD Card.
Regards,
Michael T
PS: Please mark this post as answered via the Verify Answer button below if you think it answers your question. Thanks!
Paul:
I should also mention that flash tool can be used to program x-loader, u-boot and kernel into NAND.
You can program any or all of those into NAND. For programming file system into NAND you need
to use u-boot.
Regards,
Michael T
Michael:
Thanks for the response, I was able to get a detailed synopsis of the issue, please see below and thank you for the support:
Attached is a brief description of where we are currently trying to communicate with the processor on the Mistral board. We had some early success using the Windows boot loader and compiling our test loads, but we were unable to optimize the compile to use the Neon for the floating point calculations in Windows CE 6.0. We've shifted gears trying to work with Code Composer in Linux. We were able to boot in Linux from the smart card, but we were unable to use the Miniterm software to communicate actively with the processor. We could work around the communications, but we still can't work through how to create a target environment in Code Composer that will work with this card. It seems like we are close but just missing the correct configuration file to use the emulator capabilities of the board. Is there something simple that we are missing? I can't seem to find anything on the Wiki that is related to these issues.
Problem: Code Composer Studio (v4) does not have target configuration files for the DM3730 or MISTRAL EVM main board rev G.
What we have done:
First, we followed the quick start guide and the board boots correctly form the SD card. We compiled a hello world app using Visual Studio 2005, placed the executable on the SD card, ran it from the Windows CE OS in the board and it worked.
We are looking to do the same with Code Composer Studio v4. We built a hello world project, but there are no target configuration files for DM3730. We created a target for omap3530 but when trying to debug we get the following error message in a dialog box:
Texas Instruments XDS100v2 USB emulator-0/IcePick_C_0
Error Connecting to the target, (Error-600@0x0), A required dynamic library could not be located, the library is not on the search path, (Release 5.0.333.0)
We looked up the configuration and GEL files from OMAP and Sitara CCS support Wiki we placed them in the correct gel and configurations directories of code composer yet CCS does not recognize these files when creating a new target configuration.
Furthermore, we installed CCS v5 on a Linux environment using VMware and Ubuntu 10.04 and we came across the same problem that we cannot target the DM3730.
We installed the DVSDK for the DM3730 on the Linux machine, we followed the software development guide however when we finish the setup.sh and Minicom runs the board does not boot up (after doing power cycle) as the guide says it would if the setup is configured as default.
In addition, we downloaded the boot files (MLO, u-boot, and uImage from the DM3730 DVSDK) into the NAND memory using Flash v1.6 thru the serial port however when we set the board to boot from NAND memory (SW4 #2,4,6 ON and the rest OFF) no images pop up on the LCD screen as it does when the board boots from the SD card.
Please advise and thank you.
some additional info:
There is no separate USB emulator attached to the board. We were under the assumption that the board contained its own emulator for the processor as part of the development kit, but that may be one of the ways we are attacking the problem incorrectly. Still, we were trying to just simulate the processor in order to compile our code in CodeComposer in hopes we could copy the executable to SD and run from there. However, we are encountering the issues mentioned in the previous email about the compiler demanding a target environment, and none of the available environments matched the DM3730 or Mistral EVM board that we are using. We have searched the internet for .gel files that matched the board, but CodeComposer still won’t recognize those files as options despite them being in the same directory as all the other .gel files.
We are looknig for quick way to use CodeComposer to compile some simple C code (utilizing the Neon coprocessor), execute on the DM3730 processor, and output a couple of lines of text results to either the Mistral board display or through the host computer connected to the processor through some emulated capability or even to a file on the SD.
Hi,
I tried to download a software to my target board using TI Flash v1.6 but failed. The error is timeout for "Wait for 2nd Loader".
I'd like to know why the problem happens and what I should do.
Here are briefs of my target board:
1. CPU: DM3730 (Cortex-A8 1GHz, DSP 800MHz)
2. System Clock Input: 12MHz Crystal between SYS_XTALIN and SYS_XTALOUT
3. Memory
-- Flash Memory: 8bit NAND (SAMSUNG K9F1G08R0B-JIB00) connected throurh GPMC CS0 Memory Space.
-- SDRAM: 2 x 16bit Mobile DDR (SAMSUNG K4X1G163PE-FGC6) through SDRC CS0 Memory Space.
4. Debug Serial Interface: UART3
5. Flash Tool: TI Flash v1.6
I changed configuration parameters in the following two files to reflect above environment.
# Specify platform memories
# Do not set bberase to 1 unless you know what you are doing - it will cause factory-marked bad blocks to be marked as good and cannot be undone
memory NAND1BITKERNEL driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 eccoffset 40
memory NAND1BITBOOT driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 eccoffset 2
memory NANDBCH4 driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 bch 4 eccoffset 36
memory NANDBCH8 driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 bch 8 eccoffset 12
memory NANDBCH4WINCE driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 bch 4 eccoffset 2
memory NANDBCH8WINCE driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 bch 8 eccoffset 2
memory NANDSWECC driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 swecc 1 eccoffset 40
memory NANDINTECC driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 intecc 1 eccoffset 36
memory NANDINFO1BITKERNEL driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 eccoffset 40
memory NANDINFO1BITBOOT driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 eccoffset 2
memory NANDINFOBCH4 driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 bch 4 eccoffset 36
memory NANDINFOBCH8 driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 bch 8 eccoffset 12
memory NANDINFOBCH4WINCE driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 bch 4 eccoffset 2
memory NANDINFOBCH8WINCE driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 bch 8 eccoffset 2
memory NANDINFOSWECC driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 swecc 1 eccoffset 40
memory NANDINFOINTECC driver Targets\Flash-Drivers\nand_onfi_16bit_8bit.bin parameters gpmc 0x6E000000 cs 0 address 0x28000000 bberase 0 onfi 0 bpp 2048 sbpp 64 ppb 64 bpl 4096 l 1 acv 0x23 f 0x0019 intecc 1 eccoffset 36
memory SDRAM parameters address 0x80000000
# Get device definitions
use .\targets\definitions\definitions_omap3.txt
# Specify OMAP configuration
MODE_32
# PRCM Configuration - OMAP3630 @ 200, CPU 1GHz
WRITE PRM_CLKSRC_CTRL 0x00000080 #gsg
WRITE PRM_CLKSEL SYS_CLKIN_SEL_12
MODIFY CM_CLKEN_PLL EN_CORE_DPLL_MODE_MASK 0x00000005
POLL_ZERO CM_IDLEST_CKGEN CM_IDLEST_CKGEN_ST_CORE_CLK_MASK
MODIFY CM_CLKEN_PLL_MPU EN_XXX_DPLL_MODE_MASK EN_XXX_DPLL_LO_PWR_BYPASS
POLL_ZERO CM_IDLEST_PLL_MPU CM_IDLEST_PLL_MPU_ST_MPU_CLK_MASK
MODIFY CM_CLKEN_PLL EN_PERIPH_DPLL_MODE_MASK EN_PERIPH_DPLL_LO_PWR_STOP
POLL_ZERO CM_IDLEST_CKGEN ST_PERIPH_CLK_DPLL4_LOCKED
MODIFY CM_CLKSEL1_PLL_MPU CM_CLKSEL1_MPU_MULDIV_MASK 0x0011F405 #gsg 48004940
MODIFY CM_CLKSEL1_PLL CM_CLKSEL1_CORE_MULDIV_MASK 0x08A60500 #gsg 48004d40
MODIFY CM_CLKSEL2_PLL CM_CLKSEL2_CORE_MULDIV_MASK_3630 0x0341B005 #gsg 48004d44
MODIFY CM_CLKEN_PLL_MPU CM_CLKEN_MPU_FREQSEL_MASK 0x00000030 #gsg 48004904
MODIFY CM_CLKEN_PLL CM_CLKEN_CORE_PERIPH_FREQSEL_MASK 0x00300070 #gsg 48004d00
WRITE CM_CLKSEL_CORE 0x100A
WRITE CM_CLKSEL2_PLL_MPU 0x00000001
WRITE CM_CLKSEL2_PLL_IVA2 0x00000001
MODIFY CM_CLKEN_PLL EN_XXX_DPLL_MODE_MASK EN_XXX_DPLL_LOCK_MODE
POLL_NZERO CM_IDLEST_CKGEN CM_IDLEST_CKGEN_ST_CORE_CLK_MASK
MODIFY CM_CLKEN_PLL_MPU EN_XXX_DPLL_MODE_MASK EN_XXX_DPLL_LOCK_MODE
POLL_NZERO CM_IDLEST_PLL_MPU CM_IDLEST_PLL_MPU_ST_MPU_CLK_MASK
WRITE CM_CLKSEL3_PLL 0x00000010
WRITE CM_CLKSEL3_PLL 0x00000009
WRITE CM_CLKSEL_DSS 0x00001009 #gsg
WRITE CM_CLKSEL_CAM 0x00000004
MODIFY CM_CLKEN_PLL EN_PERIPH_DPLL_MODE_MASK EN_PERIPH_DPLL_LOCK_MODE
POLL_NZERO CM_IDLEST_CKGEN ST_PERIPH_CLK_DPLL4_LOCKED
WRITE CM_FCLKEN1_CORE 0x43FFFE01
WRITE CM_ICLKEN1_CORE 0x6FFFFEDB #gsg
WRITE CM_FCLKEN_WKUP 0x000000E9
WRITE CM_ICLKEN_WKUP 0x0000003F #gsg
WRITE CM_FCLKEN_PER 0x0003FFFF
WRITE CM_ICLKEN_PER 0x0003FFFF
# SDRC Configuration - Hynix 2 Gb
WRITE SDRC_SYSCONFIG 0x00000010
POLL_NZERO SDRC_STATUS 0x00000001
WRITE SDRC_SYSCONFIG 0x00000000
WRITE SDRC_SHARING 0x00000100
WRITE SDRC_MCFG_0 0x00F08099
WRITE SDRC_RFR_CTRL_0 0x0004E201
WRITE SDRC_ACTIM_CTRLA_0 0xC29DB485
WRITE SDRC_ACTIM_CTRLB_0 0x00012114
WRITE SDRC_POWER 0x00000081
WRITE SDRC_MANUAL_0 0x00000000
WRITE SDRC_MANUAL_0 0x00000001
WRITE SDRC_MANUAL_0 0x00000002
WRITE SDRC_MANUAL_0 0x00000002
WRITE SDRC_MR_0 0x00000032
WRITE SDRC_MCFG_1 0x00F00099
WRITE SDRC_RFR_CTRL_1 0x0004E201
WRITE SDRC_ACTIM_CTRLA_1 0xC29DB485
WRITE SDRC_ACTIM_CTRLB_1 0x00012114
WRITE SDRC_MANUAL_1 0x00000000
WRITE SDRC_MANUAL_1 0x00000001
WRITE SDRC_MANUAL_1 0x00000002
WRITE SDRC_MANUAL_1 0x00000002
WRITE SDRC_MR_1 0x00000032
WRITE SDRC_CS_CFG 0x00000002
WRITE SDRC_DLLA_CTRL 0x0000000A
POLL_ZERO SDRC_DLLA_STATUS 0x00000004
# Pin multiplexing
MODE_16
MODIFY CONTROL_PADCONF_SDRC_DQS3_HI 0x001F 0x0008 # gpmc_a1
MODIFY CONTROL_PADCONF_GPMC_A2 0x001F 0x0008 # gpmc_a2
MODIFY CONTROL_PADCONF_GPMC_A2_HI 0x001F 0x0008 # gpmc_a3
MODIFY CONTROL_PADCONF_GPMC_A4 0x001F 0x0008 # gpmc_a4
MODIFY CONTROL_PADCONF_GPMC_A4_HI 0x001F 0x0008 # gpmc_a5
MODIFY CONTROL_PADCONF_GPMC_A6 0x001F 0x0008 # gpmc_a6
MODIFY CONTROL_PADCONF_GPMC_A6_HI 0x001F 0x0008 # gpmc_a7
MODIFY CONTROL_PADCONF_GPMC_A8 0x001F 0x0004 # gpmc_a8
MODIFY CONTROL_PADCONF_GPMC_A8_HI 0x001F 0x0004 # gpmc_a9
MODIFY CONTROL_PADCONF_GPMC_A10 0x001F 0x0004 # gpmc_a10
MODIFY CONTROL_PADCONF_GPMC_A10_HI 0x001F 0x0108 # gpmc_d0
MODIFY CONTROL_PADCONF_GPMC_D1 0x001F 0x0108 # gpmc_d1
MODIFY CONTROL_PADCONF_GPMC_D1_HI 0x001F 0x0108 # gpmc_d2
MODIFY CONTROL_PADCONF_GPMC_D3 0x001F 0x0108 # gpmc_d3
MODIFY CONTROL_PADCONF_GPMC_D3_HI 0x001F 0x0108 # gpmc_d4
MODIFY CONTROL_PADCONF_GPMC_D5 0x001F 0x0108 # gpmc_d5
MODIFY CONTROL_PADCONF_GPMC_D5_HI 0x001F 0x0108 # gpmc_d6
MODIFY CONTROL_PADCONF_GPMC_D7 0x001F 0x0108 # gpmc_d7
MODIFY CONTROL_PADCONF_GPMC_D7_HI 0x001F 0x0108 # gpmc_d8
MODIFY CONTROL_PADCONF_GPMC_D9 0x001F 0x0108 # gpmc_d9
MODIFY CONTROL_PADCONF_GPMC_D9_HI 0x001F 0x0108 # gpmc_d10
MODIFY CONTROL_PADCONF_GPMC_D11 0x001F 0x0108 # gpmc_d11
MODIFY CONTROL_PADCONF_GPMC_D11_HI 0x001F 0x0108 # gpmc_d12
MODIFY CONTROL_PADCONF_GPMC_D13 0x001F 0x0108 # gpmc_d13
MODIFY CONTROL_PADCONF_GPMC_D13_HI 0x001F 0x0108 # gpmc_d14
MODIFY CONTROL_PADCONF_GPMC_D15 0x001F 0x0108 # gpmc_d15
MODIFY CONTROL_PADCONF_GPMC_WAIT0 0x001F 0x0008 # gpmc_wait0
MODIFY CONTROL_PADCONF_GPMC_WAIT0_HI 0x001F 0x0008 # gpmc_wait1
MODIFY CONTROL_PADCONF_GPMC_WAIT2 0x001F 0x0008 # gpmc_wait2
MODIFY CONTROL_PADCONF_GPMC_WAIT2_HI 0x001F 0x0008 # gpmc_wait3
MODIFY CONTROL_PADCONF_GPMC_D15_HI 0x001F 0x0018 # gpmc_ncs0
MODIFY CONTROL_PADCONF_GPMC_NCS1 0x001F 0x0018 # gpmc_ncs1
MODIFY CONTROL_PADCONF_GPMC_NCS1_HI 0x001F 0x0018 # gpmc_ncs2
MODIFY CONTROL_PADCONF_GPMC_NCS3 0x001F 0x0018 # gpmc_ncs3
MODIFY CONTROL_PADCONF_GPMC_NADV_ALE 0x001F 0x0018 # gpmc_adv_ale
MODIFY CONTROL_PADCONF_GPMC_NADV_ALE_HI 0x001F 0x0018 #
MODIFY CONTROL_PADCONF_GPMC_NWE 0x001F 0x0018 # gpmc_nwe
MODIFY CONTROL_PADCONF_GPMC_NWE_HI 0x001F 0x0018 # gpmc_nbe0_cle
MODIFY CONTROL_PADCONF_GPMC_NBE1 0x001F 0x0018 # gpmc_nbe1
MODIFY CONTROL_PADCONF_GPMC_NBE1_HI 0x001F 0x0018 # gpmc_nwp
MODIFY CONTROL_PADCONF_GPMC_NCS7 0x001F 0x0007 # gpmc_ncs7
MODIFY CONTROL_PADCONF_GPMC_NCS7_HI 0x001F 0x0000 # gpmc_clk
# GPMC configuration
MODE_32
WRITE GPMC_SYSCONFIG 0x00000010 # No idle L3 clock free running
WRITE GPMC_TIMEOUT_CONTROL 0x00000000 # Time out disabled
WRITE GPMC_IRQENABLE 0x00000000 # All interrupts disabled */
WRITE GPMC_CONFIG 0x00000010 # WP is made high and WAIT1 active Low */
WRITE GPMC_CONFIG7_0 0x00000000 # Reset all GPMC CS to inactive
WRITE GPMC_CONFIG7_1 0x00000000
WRITE GPMC_CONFIG7_2 0x00000000
WRITE GPMC_CONFIG7_3 0x00000000
WRITE GPMC_CONFIG7_4 0x00000000
WRITE GPMC_CONFIG7_5 0x00000000
WRITE GPMC_CONFIG7_6 0x00000000
WRITE GPMC_CONFIG7_7 0x00000000
# NAND on CS0
WAIT_N 0x1000
WRITE GPMC_CONFIG7_0 0x00000000
WRITE GPMC_CONFIG1_0 0x00000800
WRITE GPMC_CONFIG2_0 0x00141400
WRITE GPMC_CONFIG3_0 0x00141400
WRITE GPMC_CONFIG4_0 0x0F010F01
WRITE GPMC_CONFIG5_0 0x010C1414
WRITE GPMC_CONFIG6_0 0x1F0F0A80
WRITE GPMC_CONFIG7_0 0x00000F48
# Registers
CM_CLKEN_PLL 0x48004D00
CM_CLKSEL1_PLL 0x48004D40
CM_CLKSEL2_PLL 0x48004D44
CM_CLKSEL3_PLL 0x48004D48
CM_IDLEST_CKGEN 0x48004D20
CM_CLKSEL2_PLL_IVA2 0x48004044
PRM_CLKSRC_CTRL 0x48307270
PRM_CLKSEL 0x48306D40
DEV_CONFIG_1 0x480022D8
DEV_CONFIG_0 0x48002274
GPIO1_MODULE_BA 0x48310000
GPIO2_MODULE_BA 0x49050000
GPIO3_MODULE_BA 0x49052000
GPIO4_MODULE_BA 0x49054000
GPIO5_MODULE_BA 0x49056000
GPIO6_MODULE_BA 0x49058000
CM_CLKOUT_CTRL 0x48004D70
CM_CLKEN_PLL_MPU 0x48004904
CM_IDLEST_PLL_MPU 0x48004924
CM_AUTOIDLE_PLL_MPU 0x48004934
CM_CLKSEL1_PLL_MPU 0x48004940
CM_CLKSEL2_PLL_MPU 0x48004944
CM_CLKSTCTRL_MPU 0x48004948
CM_CLKSTST_MPU 0x4800494C
CM_FCLKEN1_CORE 0x48004A00
CM_FCLKEN3_CORE 0x48004A08
CM_ICLKEN1_CORE 0x48004A10
CM_ICLKEN2_CORE 0x48004A14
CM_ICLKEN3_CORE 0x48004A18
CM_IDLEST1_CORE 0x48004A20
CM_IDLEST2_CORE 0x48004A24
CM_AUTOIDLE1_CORE 0x48004A30
CM_AUTOIDLE2_CORE 0x48004A34
CM_CLKSEL_CORE 0x48004A40
CM_CLKSTCTRL_CORE 0x48004A48
CM_CLKSTST_CORE 0x48004A4C
CM_CLKSEL_GFX 0x48004B40
CM_FCLKEN_DSS 0x48004E00
CM_ICLKEN_DSS 0x48004E10
CM_IDLEST_DSS 0x48004E20
CM_AUTOIDLE_DSS 0x48004E30
CM_CLKSEL_DSS 0x48004E40
CM_SLEEPDEP_DSS 0x48004E44
CM_CLKSTCTRL_DSS 0x48004E48
CM_CLKSTST_DSS 0x48004E4C
CM_FCLKEN_CAM 0x48004F00
CM_ICLKEN_CAM 0x48004F10
CM_IDLEST_CAM 0x48004F20
CM_AUTOIDLE_CAM 0x48004F30
CM_CLKSEL_CAM 0x48004F40
CM_SLEEPDEP_CAM 0x48004F44
CM_CLKSTCTRL_CAM 0x48004F48
CM_CLKSTST_CAM 0x48004F4C
CM_FCLKEN_PER 0x48005000
CM_ICLKEN_PER 0x48005010
CM_IDLEST_PER 0x48005020
CM_AUTOIDLE_PER 0x48005030
CM_CLKSEL_PER 0x48005040
CM_SLEEPDEP_PER 0x48005044
CM_CLKSTCTRL_PER 0x48005048
CM_CLKSTST_PER 0x4800504C
CM_CLKSEL1_EMU 0x48005140
CM_FCLKEN_WKUP 0x48004C00
CM_ICLKEN_WKUP 0x48004C10
CM_IDLEST_WKUP 0x48004C20
CM_AUTOIDLE_WKUP 0x48004C30
CM_CLKSEL_WKUP 0x48004C40
CONTROL_PADCONF_GPMC_A2 0x4800207C
CONTROL_PADCONF_GPMC_A2_HI 0x4800207E
CONTROL_PADCONF_GPMC_A4 0x48002080
CONTROL_PADCONF_GPMC_A4_HI 0x48002082
CONTROL_PADCONF_GPMC_A6 0x48002084
CONTROL_PADCONF_GPMC_A6_HI 0x48002086
CONTROL_PADCONF_GPMC_A8 0x48002088
CONTROL_PADCONF_GPMC_A8_HI 0x4800208A
CONTROL_PADCONF_GPMC_A10 0x4800208C
CONTROL_PADCONF_GPMC_A10_HI 0x4800208E
CONTROL_PADCONF_GPMC_D1 0x48002090
CONTROL_PADCONF_GPMC_D1_HI 0x48002092
CONTROL_PADCONF_GPMC_D3 0x48002094
CONTROL_PADCONF_GPMC_D3_HI 0x48002096
CONTROL_PADCONF_GPMC_D5 0x48002098
CONTROL_PADCONF_GPMC_D5_HI 0x4800209A
CONTROL_PADCONF_GPMC_D7 0x4800209C
CONTROL_PADCONF_GPMC_D7_HI 0x4800209E
CONTROL_PADCONF_GPMC_D9 0x480020A0
CONTROL_PADCONF_GPMC_D9_HI 0x480020A2
CONTROL_PADCONF_GPMC_D11 0x480020A4
CONTROL_PADCONF_GPMC_D11_HI 0x480020A6
CONTROL_PADCONF_GPMC_D13 0x480020A8
CONTROL_PADCONF_GPMC_D13_HI 0x480020AA
CONTROL_PADCONF_GPMC_D15 0x480020AC
CONTROL_PADCONF_GPMC_D15_HI 0x480020AE
CONTROL_PADCONF_GPMC_NCS1 0x480020B0
CONTROL_PADCONF_GPMC_NCS1_HI 0x480020B2
CONTROL_PADCONF_GPMC_NCS3 0x480020B4
CONTROL_PADCONF_GPMC_NCS3_HI 0x480020B6
CONTROL_PADCONF_GPMC_NCS5 0x480020B8
CONTROL_PADCONF_GPMC_NCS5_HI 0x480020BA
CONTROL_PADCONF_GPMC_NCS7 0x480020BC
CONTROL_PADCONF_GPMC_NCS7_HI 0x480020BE
CONTROL_PADCONF_GPMC_NADV_ALE 0x480020C0
CONTROL_PADCONF_GPMC_NADV_ALE_HI 0x480020C2
CONTROL_PADCONF_GPMC_NWE 0x480020C4
CONTROL_PADCONF_GPMC_NWE_HI 0x480020C6
CONTROL_PADCONF_GPMC_NBE1 0x480020C8
CONTROL_PADCONF_GPMC_NBE1_HI 0x480020CA
CONTROL_PADCONF_GPMC_WAIT0 0x480020CC
CONTROL_PADCONF_GPMC_WAIT0_HI 0x480020CE
CONTROL_PADCONF_GPMC_WAIT2 0x480020D0
CONTROL_PADCONF_GPMC_WAIT2_HI 0x480020D2
CONTROL_PADCONF_DSS_PCLK 0x480020D4
CONTROL_PADCONF_DSS_PCLK_HI 0x480020D6
CONTROL_PADCONF_DSS_VSYNC 0x480020D8
CONTROL_PADCONF_DSS_VSYNC_HI 0x480020DA
CONTROL_PADCONF_DSS_DATA0 0x480020DC
CONTROL_PADCONF_DSS_DATA0_HI 0x480020DE
CONTROL_PADCONF_DSS_DATA2 0x480020E0
CONTROL_PADCONF_DSS_DATA2_HI 0x480020E2
CONTROL_PADCONF_DSS_DATA4 0x480020E4
CONTROL_PADCONF_DSS_DATA4_HI 0x480020E6
CONTROL_PADCONF_DSS_DATA6 0x480020E8
CONTROL_PADCONF_DSS_DATA6_HI 0x480020EA
CONTROL_PADCONF_DSS_DATA8 0x480020EC
CONTROL_PADCONF_DSS_DATA8_HI 0x480020EE
CONTROL_PADCONF_DSS_DATA10 0x480020F0
CONTROL_PADCONF_DSS_DATA10_HI 0x480020F2
CONTROL_PADCONF_DSS_DATA12 0x480020F4
CONTROL_PADCONF_DSS_DATA12_HI 0x480020F6
CONTROL_PADCONF_DSS_DATA14 0x480020F8
CONTROL_PADCONF_DSS_DATA14_HI 0x480020FA
CONTROL_PADCONF_DSS_DATA16 0x480020FC
CONTROL_PADCONF_DSS_DATA16_HI 0x480020FE
CONTROL_PADCONF_DSS_DATA18 0x48002100
CONTROL_PADCONF_DSS_DATA18_HI 0x48002102
CONTROL_PADCONF_DSS_DATA20 0x48002104
CONTROL_PADCONF_DSS_DATA20_HI 0x48002106
CONTROL_PADCONF_DSS_DATA22 0x48002108
CONTROL_PADCONF_DSS_DATA22_HI 0x4800210A
CONTROL_PADCONF_CAM_HS 0x4800210C
CONTROL_PADCONF_CAM_HS_HI 0x4800210E
CONTROL_PADCONF_CAM_XCLKA 0x48002110
CONTROL_PADCONF_CAM_XCLKA_HI 0x48002112
CONTROL_PADCONF_CAM_FLD 0x48002114
CONTROL_PADCONF_CAM_FLD_HI 0x48002116
CONTROL_PADCONF_CAM_D1 0x48002118
CONTROL_PADCONF_CAM_D1_HI 0x4800211A
CONTROL_PADCONF_CAM_D3 0x4800211C
CONTROL_PADCONF_CAM_D3_HI 0x4800211E
CONTROL_PADCONF_CAM_D5 0x48002120
CONTROL_PADCONF_CAM_D5_HI 0x48002122
CONTROL_PADCONF_CAM_D7 0x48002124
CONTROL_PADCONF_CAM_D7_HI 0x48002126
CONTROL_PADCONF_CAM_D9 0x48002128
CONTROL_PADCONF_CAM_D9_HI 0x4800212A
CONTROL_PADCONF_CAM_D11 0x4800212C
CONTROL_PADCONF_CAM_D11_HI 0x4800212E
CONTROL_PADCONF_CAM_WEN 0x48002130
CONTROL_PADCONF_CAM_WEN_HI 0x48002132
CONTROL_PADCONF_CSI2_DX0 0x48002134
CONTROL_PADCONF_CSI2_DX0_HI 0x48002136
CONTROL_PADCONF_CSI2_DX1 0x48002138
CONTROL_PADCONF_CSI2_DX1_HI 0x4800213A
CONTROL_PADCONF_MCBSP2_FSX 0x4800213C
CONTROL_PADCONF_MCBSP2_FSX_HI 0x4800213E
CONTROL_PADCONF_MCBSP2_DR 0x48002140
CONTROL_PADCONF_MCBSP2_DR_HI 0x48002142
CONTROL_PADCONF_MMC1_CLK 0x48002144
CONTROL_PADCONF_MMC1_CLK_HI 0x48002146
CONTROL_PADCONF_MMC1_DAT0 0x48002148
CONTROL_PADCONF_MMC1_DAT0_HI 0x4800214A
CONTROL_PADCONF_MMC1_DAT2 0x4800214C
CONTROL_PADCONF_MMC1_DAT2_HI 0x4800214E
CONTROL_PADCONF_MMC1_DAT4 0x48002150
CONTROL_PADCONF_MMC1_DAT4_HI 0x48002152
CONTROL_PADCONF_MMC1_DAT6 0x48002154
CONTROL_PADCONF_MMC1_DAT6_HI 0x48002156
CONTROL_PADCONF_MMC2_CLK 0x48002158
CONTROL_PADCONF_MMC2_CLK_HI 0x4800215A
CONTROL_PADCONF_MMC2_DAT0 0x4800215C
CONTROL_PADCONF_MMC2_DAT0_HI 0x4800215E
CONTROL_PADCONF_MMC2_DAT2 0x48002160
CONTROL_PADCONF_MMC2_DAT2_HI 0x48002162
CONTROL_PADCONF_MMC2_DAT4 0x48002164
CONTROL_PADCONF_MMC2_DAT4_HI 0x48002166
CONTROL_PADCONF_MMC2_DAT6 0x48002168
CONTROL_PADCONF_MMC2_DAT6_HI 0x4800216A
CONTROL_PADCONF_MCBSP3_DX 0x4800216C
CONTROL_PADCONF_MCBSP3_DX_HI 0x4800216E
CONTROL_PADCONF_MCBSP3_CLKX 0x48002170
CONTROL_PADCONF_MCBSP3_CLKX_HI 0x48002172
CONTROL_PADCONF_UART2_CTS 0x48002174
CONTROL_PADCONF_UART2_CTS_HI 0x48002176
CONTROL_PADCONF_UART2_TX 0x48002178
CONTROL_PADCONF_UART2_TX_HI 0x4800217A
CONTROL_PADCONF_UART1_TX 0x4800217C
CONTROL_PADCONF_UART1_TX_HI 0x4800217E
CONTROL_PADCONF_UART1_CTS 0x48002180
CONTROL_PADCONF_UART1_CTS_HI 0x48002182
CONTROL_PADCONF_MCBSP4_CLKX 0x48002184
CONTROL_PADCONF_MCBSP4_CLKX_HI 0x48002186
CONTROL_PADCONF_MCBSP4_DX 0x48002188
CONTROL_PADCONF_MCBSP4_DX_HI 0x4800218A
CONTROL_PADCONF_MCBSP1_CLKR 0x4800218C
CONTROL_PADCONF_MCBSP1_CLKR_HI 0x4800218E
CONTROL_PADCONF_MCBSP1_DX 0x48002190
CONTROL_PADCONF_MCBSP1_DX_HI 0x48002192
CONTROL_PADCONF_MCBSP_CLKS 0x48002194
CONTROL_PADCONF_MCBSP_CLKS_HI 0x48002196
CONTROL_PADCONF_MCBSP1_CLKX 0x48002198
CONTROL_PADCONF_MCBSP1_CLKX_HI 0x4800219A
CONTROL_PADCONF_UART3_RTS_SD 0x4800219C
CONTROL_PADCONF_UART3_RTS_SD_HI 0x4800219E
CONTROL_PADCONF_UART3_TX_IRTX 0x480021A0
CONTROL_PADCONF_UART3_TX_IRTX_HI 0x480021A2
CONTROL_PADCONF_HSUSB0_STP 0x480021A4
CONTROL_PADCONF_HSUSB0_STP_HI 0x480021A6
CONTROL_PADCONF_HSUSB0_NXT 0x480021A8
CONTROL_PADCONF_HSUSB0_NXT_HI 0x480021AA
CONTROL_PADCONF_HSUSB0_DATA1 0x480021AC
CONTROL_PADCONF_HSUSB0_DATA1_HI 0x480021AE
CONTROL_PADCONF_HSUSB0_DATA3 0x480021B0
CONTROL_PADCONF_HSUSB0_DATA3_HI 0x480021B2
CONTROL_PADCONF_HSUSB0_DATA5 0x480021B4
CONTROL_PADCONF_HSUSB0_DATA5_HI 0x480021B6
CONTROL_PADCONF_HSUSB0_DATA7 0x480021B8
CONTROL_PADCONF_HSUSB0_DATA7_HI 0x480021BA
CONTROL_PADCONF_I2C1_SDA 0x480021BC
CONTROL_PADCONF_I2C1_SDA_HI 0x480021BE
CONTROL_PADCONF_I2C2_SDA 0x480021C0
CONTROL_PADCONF_I2C2_SDA_HI 0x480021C2
CONTROL_PADCONF_I2C3_SDA 0x480021C4
CONTROL_PADCONF_I2C3_SDA_HI 0x480021C6
CONTROL_PADCONF_MCSPI1_CLK 0x480021C8
CONTROL_PADCONF_MCSPI1_CLK_HI 0x480021CA
CONTROL_PADCONF_MCSPI1_SOMI 0x480021CC
CONTROL_PADCONF_MCSPI1_SOMI_HI 0x480021CE
CONTROL_PADCONF_MCSPI1_CS1 0x480021D0
CONTROL_PADCONF_MCSPI1_CS1_HI 0x480021D2
CONTROL_PADCONF_MCSPI1_CS3 0x480021D4
CONTROL_PADCONF_MCSPI1_CS3_HI 0x480021D6
CONTROL_PADCONF_MCSPI2_SIMO 0x480021D8
CONTROL_PADCONF_MCSPI2_SIMO_HI 0x480021DA
CONTROL_PADCONF_MCSPI2_CS0 0x480021DC
CONTROL_PADCONF_MCSPI2_CS0_HI 0x480021DE
CONTROL_PADCONF_SYS_NIRQ 0x480021E0
CONTROL_PADCONF_SYS_NIRQ_HI 0x480021E2
CONTROL_PADCONF_I2C4_SCL 0x48002A00
CONTROL_PADCONF_I2C4_SCL_HI 0x48002A02
CONTROL_PADCONF_SYS_32K 0x48002A04
CONTROL_PADCONF_SYS_32K_HI 0x48002A06
CONTROL_PADCONF_SYS_NRESWARM 0x48002A08
CONTROL_PADCONF_SYS_NRESWARM_HI 0x48002A0A
CONTROL_PADCONF_SYS_BOOT1 0x48002A0C
CONTROL_PADCONF_SYS_BOOT1_HI 0x48002A0E
CONTROL_PADCONF_SYS_BOOT3 0x48002A10
CONTROL_PADCONF_SYS_BOOT3_HI 0x48002A12
CONTROL_PADCONF_SYS_BOOT5 0x48002A14
CONTROL_PADCONF_SYS_BOOT5_HI 0x48002A16
CONTROL_PADCONF_SYS_OFF_MODE 0x48002A18
CONTROL_PADCONF_SYS_OFF_MODE_HI 0x48002A1A
CONTROL_PADCONF_JTAG_NTRST 0x48002A1C
CONTROL_PADCONF_JTAG_NTRST_HI 0x48002A1E
CONTROL_PADCONF_JTAG_TMS 0x48002A20
CONTROL_PADCONF_JTAG_TMS_HI 0x48002A22
CONTROL_PADCONF_JTAG_EMU0 0x48002A24
CONTROL_PADCONF_JTAG_EMU0_HI 0x48002A26
CONTROL_PADCONF_ETK_CLK 0x480025D8
CONTROL_PADCONF_ETK_CLK_HI 0x480025DA
CONTROL_PADCONF_ETK_D0 0x480025DC
CONTROL_PADCONF_ETK_D0_HI 0x480025DE
CONTROL_PADCONF_ETK_D2 0x480025E0
CONTROL_PADCONF_ETK_D2_HI 0x480025E2
CONTROL_PADCONF_ETK_D4 0x480025E4
CONTROL_PADCONF_ETK_D4_HI 0x480025E6
CONTROL_PADCONF_ETK_D6 0x480025E8
CONTROL_PADCONF_ETK_D6_HI 0x480025EA
CONTROL_PADCONF_ETK_D8 0x480025EC
CONTROL_PADCONF_ETK_D8_HI 0x480025EE
CONTROL_PADCONF_ETK_D10 0x480025F0
CONTROL_PADCONF_ETK_D10_HI 0x480025F2
CONTROL_PADCONF_ETK_D12 0x480025F4
CONTROL_PADCONF_ETK_D12_HI 0x480025F6
CONTROL_PADCONF_ETK_D14 0x480025F8
CONTROL_PADCONF_ETK_D14_HI 0x480025FA
CONTROL_PADCONF_SAD2D_SWAKEUP 0x48002A4C
CONTROL_PADCONF_SAD2D_SPINT 0x48002238
CONTROL_PADCONF_SAD2D_SPINT_HI 0x4800223A
CONTROL_PADCONF_SDRC_D0 0x48002030
CONTROL_PADCONF_SDRC_D0_HI 0x48002032
CONTROL_PADCONF_SDRC_D2 0x48002034
CONTROL_PADCONF_SDRC_D2_HI 0x48002036
CONTROL_PADCONF_SDRC_D4 0x48002038
CONTROL_PADCONF_SDRC_D4_HI 0x4800203A
CONTROL_PADCONF_SDRC_D6 0x4800203C
CONTROL_PADCONF_SDRC_D6_HI 0x4800203E
CONTROL_PADCONF_SDRC_D8 0x48002040
CONTROL_PADCONF_SDRC_D8_HI 0x48002042
CONTROL_PADCONF_SDRC_D10 0x48002044
CONTROL_PADCONF_SDRC_D10_HI 0x48002046
CONTROL_PADCONF_SDRC_D12 0x48002048
CONTROL_PADCONF_SDRC_D12_HI 0x4800204A
CONTROL_PADCONF_SDRC_D14 0x4800204C
CONTROL_PADCONF_SDRC_D14_HI 0x4800204E
CONTROL_PADCONF_SDRC_D16 0x48002050
CONTROL_PADCONF_SDRC_D16_HI 0x48002052
CONTROL_PADCONF_SDRC_D18 0x48002054
CONTROL_PADCONF_SDRC_D18_HI 0x48002056
CONTROL_PADCONF_SDRC_D20 0x48002058
CONTROL_PADCONF_SDRC_D20_HI 0x4800205A
CONTROL_PADCONF_SDRC_D22 0x4800205C
CONTROL_PADCONF_SDRC_D22_HI 0x4800205E
CONTROL_PADCONF_SDRC_D24 0x48002060
CONTROL_PADCONF_SDRC_D24_HI 0x48002062
CONTROL_PADCONF_SDRC_D26 0x48002064
CONTROL_PADCONF_SDRC_D26_HI 0x48002066
CONTROL_PADCONF_SDRC_D28 0x48002068
CONTROL_PADCONF_SDRC_D28_HI 0x4800206A
CONTROL_PADCONF_SDRC_D30 0x4800206C
CONTROL_PADCONF_SDRC_D30_HI 0x4800206E
CONTROL_PADCONF_SDRC_CKE0 0x48002262
CONTROL_PADCONF_SDRC_CKE1 0x48002264
CONTROL_PADCONF_SDRC_CLK 0x48002070
CONTROL_PADCONF_SDRC_CLK_HI 0x48002072
CONTROL_PADCONF_SDRC_DQS1 0x48002074
CONTROL_PADCONF_SDRC_DQS1_HI 0x48002076
CONTROL_PADCONF_SDRC_DQS3 0x48002078
CONTROL_PADCONF_SDRC_DQS3_HI 0x4800207A
CONTROL_PADCONF_SYS_BOOT7_HI 0x4800221A
CONTROL_PADCONF_SDRC_DQS1N 0x4800221C
CONTROL_PADCONF_SDRC_DQS1N_HI 0x4800221E
CONTROL_PADCONF_SDRC_DQS3N 0x48002220
CONTROL_PADCONF_SDRC_DQS3N_HI 0x48002222
CONTROL_PADCONF_SDRC_STRBEN_DLY1 0x48002224
GPMC_SYSCONFIG 0x6E000010
GPMC_IRQENABLE 0x6E00001C
GPMC_TIMEOUT_CONTROL 0x6E000040
GPMC_CONFIG 0x6E000050
GPMC_CONFIG1_0 0x6E000060
GPMC_CONFIG2_0 0x6E000064
GPMC_CONFIG3_0 0x6E000068
GPMC_CONFIG4_0 0x6E00006C
GPMC_CONFIG5_0 0x6E000070
GPMC_CONFIG6_0 0x6E000074
GPMC_CONFIG7_0 0x6E000078
GPMC_CONFIG1_1 0x6E000090
GPMC_CONFIG2_1 0x6E000094
GPMC_CONFIG3_1 0x6E000098
GPMC_CONFIG4_1 0x6E00009C
GPMC_CONFIG5_1 0x6E0000A0
GPMC_CONFIG6_1 0x6E0000A4
GPMC_CONFIG7_1 0x6E0000A8
GPMC_CONFIG1_2 0x6E0000C0
GPMC_CONFIG2_2 0x6E0000C4
GPMC_CONFIG3_2 0x6E0000C8
GPMC_CONFIG4_2 0x6E0000CC
GPMC_CONFIG5_2 0x6E0000D0
GPMC_CONFIG6_2 0x6E0000D4
GPMC_CONFIG7_2 0x6E0000D8
GPMC_CONFIG1_3 0x6E0000F0
GPMC_CONFIG2_3 0x6E0000F4
GPMC_CONFIG3_3 0x6E0000F8
GPMC_CONFIG4_3 0x6E0000FC
GPMC_CONFIG5_3 0x6E000100
GPMC_CONFIG6_3 0x6E000104
GPMC_CONFIG7_3 0x6E000108
GPMC_CONFIG1_4 0x6E000120
GPMC_CONFIG2_4 0x6E000124
GPMC_CONFIG3_4 0x6E000128
GPMC_CONFIG4_4 0x6E00012C
GPMC_CONFIG5_4 0x6E000130
GPMC_CONFIG6_4 0x6E000134
GPMC_CONFIG7_4 0x6E000138
GPMC_CONFIG1_5 0x6E000150
GPMC_CONFIG2_5 0x6E000154
GPMC_CONFIG3_5 0x6E000158
GPMC_CONFIG4_5 0x6E00015C
GPMC_CONFIG5_5 0x6E000160
GPMC_CONFIG6_5 0x6E000164
GPMC_CONFIG7_5 0x6E000168
GPMC_CONFIG1_6 0x6E000180
GPMC_CONFIG2_6 0x6E000184
GPMC_CONFIG3_6 0x6E000188
GPMC_CONFIG4_6 0x6E00018C
GPMC_CONFIG5_6 0x6E000190
GPMC_CONFIG6_6 0x6E000194
GPMC_CONFIG7_6 0x6E000198
GPMC_CONFIG1_7 0x6E0001B0
GPMC_CONFIG2_7 0x6E0001B4
GPMC_CONFIG3_7 0x6E0001B8
GPMC_CONFIG4_7 0x6E0001BC
GPMC_CONFIG5_7 0x6E0001C0
GPMC_CONFIG6_7 0x6E0001C4
GPMC_CONFIG7_7 0x6E0001C8
SDRC_SYSCONFIG 0x6D000010
SDRC_STATUS 0x6D000014
SDRC_CS_CFG 0x6D000040
SDRC_ACTIM_CTRLB_0 0x6D0000A0
SDRC_MANUAL_0 0x6D0000A8
SDRC_MANUAL_1 0x6D0000D8
SDRC_ACTIM_CTRLB_1 0x6D0000C8
SDRC_SHARING 0x6D000044
SDRC_ERR_TYPE 0x6D00004C
SDRC_DLLB_CTRL 0x6D000068
SDRC_DLLA_CTRL 0x6D000060
SDRC_DLLA_STATUS 0x6D000064
SDRC_MCFG_0 0x6D000080
SDRC_MCFG_1 0x6D0000B0
SDRC_ACTIM_CTRLA_0 0x6D00009C
SDRC_ACTIM_CTRLA_1 0x6D0000C4
SDRC_DCDL1_CTRL 0x6D000094
SDRC_DCDL2_CTRL 0x6D000098
SDRC_POWER 0x6D000070
SDRC_RFR_CTRL_0 0x6D0000A4
SDRC_RFR_CTRL_1 0x6D0000D4
SDRC_MR_0 0x6D000084
SDRC_MR_1 0x6D0000B4
RT_READ_PERMISSION_0 0x68010050
RT_WRITE_PERMISSION_0 0x68010058
RT_ADDR_MATCH_1 0x68010060
RT_REQ_INFO_PERMISSION_1 0x68010068
GPMC_REQ_INFO_PERMISSION_0 0x68012448
GPMC_READ_PERMISSION_0 0x68012450
GPMC_WRITE_PERMISSION_0 0x68012458
OCM_REQ_INFO_PERMISSION_0 0x68012848
OCM_READ_PERMISSION_0 0x68012850
OCM_WRITE_PERMISSION_0 0x68012858
OCM_ADDR_MATCH_2 0x68012880 #MAT
SMS_RG_ATT0 0x6C000048
CONTROL_IPSS_CLK_CTRL 0x4800259C
CONTROL_IP_SW_RESET 0x48002598
EMIF_MOD_ID_REV 0x6d000000
EMIF_STATUS 0x6D000004
EMIF_SDRAM_CONFIG 0x6D000008
EMIF_SDRAM_REF_CTRL 0x6D000010
EMIF_SDRAM_REF_CTRL_SHDW 0x6D000014
EMIF_SDRAM_TIM_1 0x6D000018
EMIF_SDRAM_TIM_1_SHDW 0x6D00001C
EMIF_SDRAM_TIM_2 0x6D000020
EMIF_SDRAM_TIM_2_SHDW 0x6D000024
EMIF_SDRAM_TIM_3 0x6D000028
EMIF_SDRAM_TIM_3_SHDW 0x6D00002C
EMIF_PWR_MGMT_CTRL 0x6D000038
EMIF_PWR_MGMT_CTRL_SHDW 0x6D00003C
EMIF_IODFT_TLGC 0x6D000060
EMIF_DDR_PHY_CTRL_1 0x6D0000E4
EMIF_DDR_PHY_CTRL_1_SHDW 0x6D0000E8
EMIF_DDR_PHY_CTRL_2 0x6D0000EC
# Masks
CM_FCLKEN1_CORE_EN_MASK 0x43FFFE01
CM_ICLKEN1_CORE_EN_MASK 0x63FFFED3
CM_FCLKEN_WKUP_EN_MASK 0x000000E9
CM_ICLKEN_WKUP_EN_MASK 0x0000002D
CM_FCLKEN_PER_EN_MASK 0x0003FFFF
CM_ICLKEN_PER_EN_MASK 0x0003FFFF
EN_CORE_DPLL_MODE_MASK 0x00000007
CM_IDLEST_CKGEN_ST_CORE_CLK_MASK 0x00000001
EN_XXX_DPLL_MODE_MASK 0x00000007
CM_IDLEST_PLL_MPU_ST_MPU_CLK_MASK 0x00000001
EN_PERIPH_DPLL_MODE_MASK 0x00070000
CM_CLKSEL1_MPU_MULDIV_MASK 0x0007FF7F
CM_CLKSEL1_CORE_MULDIV_MASK 0x07FF7F00
CM_CLKSEL2_CORE_MULDIV_MASK_3630 0xFFEFFF7F
CM_CLKSEL2_CORE_MULDIV_MASK_3430 0x000FFF7F
CM_CLKEN_MPU_FREQSEL_MASK 0x000000F0
CM_CLKEN_CORE_PERIPH_FREQSEL_MASK 0x00F000F0
# Values
EN_XXX_DPLL_LO_PWR_STOP 0x00000001
EN_XXX_DPLL_LO_PWR_BYPASS 0x00000005
EN_XXX_DPLL_LOCK_MODE 0x00000007
EN_PERIPH_DPLL_LO_PWR_STOP 0x00010000
ST_PERIPH_CLK_DPLL4_LOCKED 0x00000002
MPU_MULDIV_26 0x0000FA0C # 250/12
CORE_MULDIV_26 0x00A60C00 # 166/12
PERIPH_MULDIV_26_3630 0x0461D10D
PERIPH_MULDIV_26_3430 0x0000D80C
MPU_DPLL_FREQSEL 0x00000070
CORE_PERIPH_DPLL_FREQSEL 0x00700070
EN_PERIPH_DPLL_LOCK_MODE 0x00070000
SYS_CLKIN_SEL_12 0x00000000
SYS_CLKIN_SEL_26 0x00000003
I already checked these parameter settings using SD Boot mode. it's working fine.
Here is output log on TI Flash tool.
---------------------------------------------------------------------------------------------------------------------------
-stdout
-omap 3
-no_force_package_alignment
-com 4
-t 60
-p CUSTOM_AM37XX_BOARD
-2
chip_download NANDINFO1BITBOOT C:\WINCE600\PLATFORM\HLT_OMAP3530\WORKSPACE\HLT_3530\HLT_3530\RelDir\HLT_OMAP3530_ARMV4I_Release\XLDRNAND.nb0
Leaving parameter file:temp_script.txt
@temp_script.txt
Looking for device (omap com4)
Please turn off device, then turn it on again
Awaiting ASIC id
Awaiting ASIC id
AsicId items 04
AsicId id 01 05 01 36 30 07 07
AsicId secure_mode 13 02 01 00
AsicId public_id 12 15 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
AsicId root_key_hash 14 15 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Searching 2nd for: CUSTOM_AM37XX_BOARD 363007 07 GP
Loading second file Targets\2nd-Downloaders\dnld_startup_omap3_gp_2g.2nd
Entering parameter file:omapflash2nd.txt at line: 9
-pheriphalboot_reopen
Reading board configuration file Targets\Configurations\configuration_custom_am37xx.txt
Reading definition file .\targets\definitions\definitions_omap3.txt
-board_config Targets\Configurations\configuration_custom_am37xx.txt
Leaving parameter file:omapflash2nd.txt
Sending size of second file (0x00006804 bytes)
Transferring second file to target (0x6804 bytes)
Closing boot connection
Found device (omap com4)
Waiting for 2nd
Reception failed - timeout after 60 s during peripheral boot (waiting for 2nd)
Console program failed, exit code: 2
---------------------------------------------------------------------------------------------------------------------------
Hello Sangpil,
I came across this post which describes the exact failure code I'm getting on my custom board when trying to erase a region of NAND. I'm using an AM3703 with a Micron 2G NAND (x16). I assume you figured out your issue as this is an old post. Would you mind sharing with me what your issue was? I was puzzled as to which step in the flashing process things got hung up. It appears the 2nd loader makes into internal memory of the processor, but then can't transfer the memory driver from the COM port. Is this what is happening? Here is the dump from my Flash screen. Any help would be greatly appreciated in terms of where I can begin looking.
Thanks in advance.
Bob
¯ -stdout
¯ -omap 3
¯ -no_force_package_alignment
¯ -com 5
¯ -t 60
¯ -p CUSTOM_AM37XX_BOARD
¯ -2
¯ chip_erase NANDINFO1BITBOOT 00008000
¯ Leaving parameter file:temp_script.txt
¯ @temp_script.txt
¯ Looking for device (omap com5)
¯ Please turn off device, then turn it on again
¯ Awaiting ASIC id
¯ AsicId items 04
¯ AsicId id 01 05 01 36 30 07 07
¯ AsicId secure_mode 13 02 01 00
¯ AsicId public_id 12 15 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
¯ AsicId root_key_hash 14 15 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
¯ Searching 2nd for: CUSTOM_AM37XX_BOARD 363007 07 GP
¯ Loading second file Targets\2nd-Downloaders\dnld_startup_omap3_gp_2g.2nd
¯ Entering parameter file:omapflash2nd.txt at line: 9
¯ -pheriphalboot_reopen
¯ Reading board configuration file Targets\Configurations\configuration_custom_am37xx.txt
¯ Reading definition file .\targets\definitions\definitions_gnc.txt
¯ -board_config Targets\Configurations\configuration_custom_am37xx.txt
¯ Leaving parameter file:omapflash2nd.txt
¯ Sending size of second file (0x00006804 bytes)
¯ Transferring second file to target (0x6804 bytes)
¯ Closing boot connection
¯ Found device (omap com5)
¯ Waiting for 2nd
¯ Reception failed - timeout after 60 s during peripheral boot (waiting for 2nd)
Console program failed, exit code: 2
