I am bringing up a new design that uses several of the CS spaces to access CPLDs using the async multiplexed GPMC access. The upper address bits assume a static value and don't correspond to the address I am trying to access. For example, CS4 space starts at 0x1200 0000 and the GPMC bus will always drive a static value on A26:A17. Is there something is a configuration register that disables the upper address lines? When I set the LIMITEDADDRESS bit in register GPMC_CONFIG to a 1, these upper address lines assume the value 0x3FF. When I clear this bit the upper address lines "pick" a value and stick with it no matter what address I try to access.