I am hoping to use Vitesse VSC8221 PHY with DM647 processor. The VSC8221 has 625MHz differential output clock for connection to clock input of DM647 SGMII. It is not clear from the DM647 data sheet if this is acceptable. I hope it is OK to use 625MHz as REFCLKN/P inputs and then disable the DM647 SGMII PLL. Can anyone tell me if this is OK
Thanks!