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shared memory problem

Mohamed Osama
Intellectual 300 points
Other Parts Discussed in Thread: SYSBIOS

I f i want to write and read in and from shared memory from different cores in DM8148 chip. should i freeze the cache of the DSP core while write and reading from the DSP?

  • 0
    Genius 4375 points

    Mohamed Osama said:
    should i freeze the cache of the DSP core while write and reading from the DSP?

    You could do this if you need to read & write to cached shared memory.  You could also perform cache operations (invalidate/writeback) to maintain cache coherency as well.  This is the strategy employed by IPC modules (ListMP, HeapBufMP, etc) to maintain cache coherency.  You can refer to the documentation for the ti.sysbios.hal.unicache.Cache module for more information.

    Regards,

    Shreyas