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L2 memory access

Udi Zoahr
Prodigy 20 points

Hi

We're currently in the beginning of development on C6678 (right now just with the simulator) and we have some questions on the memory access: 

      1.      How many cycles are required when core-n trying to access to its own L2 memory when the data is or is not in L1 level?

2.      Is the number of the required cycles from 1. remained the same when the accessing is now from another core (to the same L2 memory using the global address)?

Thanks

Udi

  • 0
    TI__Guru* 84110 points

    Udi,

    We do not specify timing values such as what you ask. It is difficult to document all the scenarios that would make an answer complete.

    The best method for you to get an idea of the time it will take to implement an algorithm that you wish to use is to test it in the device simulator and take measurements from there. Then when you get an evaluation board, you can take measurements on silicon and compare your results.

    The number of cycles for accessing a core's own L2 memory will be faster than accessing another core's L2 memory.

    Regards,
    RandyP

     

    If you need more help, please reply back. If this answers the question, please click  Verify Answer  , below.