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TDA4VM-Q1: how to set csi DPHY clock

Part Number: TDA4VM-Q1
Other Parts Discussed in Thread: TDA4VM

Hi Ti:

        I connect camera to TDA4VM EVM. That is : camera-max9295——max9296-csi0 of J721E .  The SDK I using is ti-processor-sdk-linux-j7-evm-08_05_00_08. After I set max9295 and max9296 I can get data from /dev/video0. The register   CSI_RX_IF_VBUS2APB_DPHY_STATUS value  toggle between 0x00222207 and 0x00333307. This means DPHY Clock is in Stop State ? So what should I do ? Thanks

  • By the way, I can see clock and data lane wave of max9296 output using oscilloscope.

  • Hi,

    Is max9295 - max9296 GMSL based ser-des?

    Please note that GMSL based ser-des is currently not supported on TI SDK, hence this has not been tested at TI's end.

    You would have to refer the driver implementation and the device tree integration for UB953 - UB960 ser-des and do the same for GMSL based ser-des

    Have you already taken care of this?

    Regards,
    Nikhil