1. SPI nor flash power-on startup problem:
Phenomenon: The startup fails after power failure. Connect the emulator and display the pointer address (0x20B0EAEC) in the internal ROM, indicating that the startup is not successful.
Processed process:
The first step is to burn the EEPROM boot program:
1）. Set the dial code to no boot mode; 2. Connect the simulator; 3. Load the gel file; 4. Load EEPROMWriter. out into I2C EEPROM; 5. Fix the execution program eeprom.bin file into the 0x0C000000 address of EEPROM through Load Memory, bus_ Addr=81, the running display is successful; Power failure
The second step is to solidify the nor flash application:
2）. Set the dial code to no boot mode; 2. Connect the simulator; 3. Load the gel file; 4. load: NorFlashWriter. out, 4. Fix the app. bin file of the executable program into the 0x80000000 address of the nor flash through Load Memory, and the operation displays successful, and then power off.
Set the dial switch of boot mode to [12:0] 0_ 0010_ 0001_ 0110, the power-on procedure was not executed normally.
Uncertainty of the whole process:
1）. It is uncertain whether the ibl file of EEPROM is correct？
2）. The dial code of boot mode is incorrect？
2.SRIO communication problem between DSP master station and FPGA:
The communication mode is SWRITE streaming mode, and the SRIO bus is 2x mode
Problems occurred:
1）. When the length of data sent by DSP is 512, it will be sent in two packets, but there will be a transmission interval of about 1 us between them;
2）. The program will stay in the uiCompletionCode read state all the time, and the FPGA will jump out normally after the number of times, but the SWRITE mode does not respond.
