TMS320C6678: SPI can't run at 9.6khz speed which is triggered by timer

Shine,

 I experimented C6678 EVM with 1 GHz as core clock.

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The following is the gel output. Notice the SYSCLK7 below as 200 MHz.

---- >We could drive the SPI clock by 200 MHz, if the core clock is 1 GHz.

------> If the core clock is 800 MHz, the SPI Clock could be derived at 133 MHz.

C66xx_0: GEL Output: PLL in Bypass ...
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1200.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 400.0 MHz, SYSCLK5 = 240.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 18.75 MHz.
C66xx_0: GEL Output: SYSCLK7 = 200.0 MHz.
C66xx_0: GEL Output: PLL1 Setup... Done.

Regards

Shankari G

Shine,

----

Let me explain with the formula in the data sheet..

======================================

SPI clock frequency = SPI module clock / ( prescale + 1 )

==> core frequency = 1 GHz.

====> SYSCLK7 = 1 GHz / 6 = 166666666 Hz ---> 166 MHz.

=====> SPI Module Clock = 166 MHz.

===> Prescale ranges between 0 - FF ===> 0 - 255

========================================

Maximum SPI clock frequency =  166666666 / ( 0 + 1) ----- > with the prescale value as 0

                                                    = 166 MHz 

Minimum SPI clock frequency =  166666666 / ( 255 + 1) -----> with the pre-scale value as 255 

                                                    =  651041 Hz --> ~ 660000 Hz --->In your snapshot. It should have another zero as /*. clockSpeedKHz = */ 660000,

                                                    = 651 KHz. 

As the minimum SPI clock frequency is 651 KHz, it cannot run at 9.6 KHz.

==========================================

Please refer to this code for more clarity on SPI DATA format configuration.

This code is part of processor SDK 6.3. 

When I experimented, I could transfer the data into the SPI-NOR memory using this SPI-clock configuration, below.

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The SPI module clock is 166 MHz and the SPI Max frequency is 25 MHz

And hence the prescale value = 5

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In evmc665x_spi.c loated at  ---- > C:\ti\pdk_c665x_2_0_16\packages\ti\platform\evmc6657l\platform_lib\src\evmc665x_spi.c

#define SPI_MODULE_CLK 166666666 /* SYSCLK7 = CPU_Clk/6 in HZ */
#define SPI_MAX_FREQ 25000000 /* SPI Max frequency in Hz */

----

/* setup format */
scalar = ((SPI_MODULE_CLK / freq) - 1 ) & 0xFF;

if ( cs == 0) {
SPI_SPIFMT0 = (8 << CSL_SPI_SPIFMT_CHARLEN_SHIFT) |
                           (scalar << CSL_SPI_SPIFMT_PRESCALE_SHIFT) |
                           (CSL_SPI_SPIFMT_PHASE_DELAY << CSL_SPI_SPIFMT_PHASE_SHIFT) |
                           (CSL_SPI_SPIFMT_POLARITY_LOW << CSL_SPI_SPIFMT_POLARITY_SHIFT) |
                           (CSL_SPI_SPIFMT_SHIFTDIR_MSB << CSL_SPI_SPIFMT_SHIFTDIR_SHIFT);
}else if ( cs == 1) {
SPI_SPIFMT0 = (16 << CSL_SPI_SPIFMT_CHARLEN_SHIFT) |
                           (scalar << CSL_SPI_SPIFMT_PRESCALE_SHIFT) |
                           (CSL_SPI_SPIFMT_PHASE_NO_DELAY << CSL_SPI_SPIFMT_PHASE_SHIFT) |
                           (CSL_SPI_SPIFMT_POLARITY_LOW << CSL_SPI_SPIFMT_POLARITY_SHIFT) |
                           (CSL_SPI_SPIFMT_SHIFTDIR_MSB << CSL_SPI_SPIFMT_SHIFTDIR_SHIFT);
}

I hope this helps!

Regards

Shankari G