Using /dev/watchdog and hardware watchdog, purposely stop writing to /dev/watchdog causing hardware watchdog to reset.
After about a minute, I do get a reset to occur.
We are seeing that at times the i2c bus on K21,J21 will not talk due to the data line being held low. We have PMIC connected to that bus as the only device.
This problem does not occur every time, I would say about 25% of the time without a huge number of sample tests.
In many cases, i2c bus issues can be resolved by using the lines as GPIO, and sending data 0's on the bus....
From the datasheet it does not appear I have this luxury.
Is it possible to set the hardware watchdog to perform a cold reset instead of a warm reset? Is there a way to configure the processor to do this?
Any other ideas for us to look at to understand why the system can't access the bus after the watchdog triggers?
Thanks.