• State TI Thinks Resolved
  • Locked Locked
  • Replies 11 replies
  • Answers 2 answers
  • Subscribers 102 subscribers
  • Views 576 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM625: QSPI NAND FLASH NOT WORKING WITH AM6254

brijesh kathavadia
Prodigy 70 points
Part Number: AM625

Hello TI Team,

We need your quick help on below please. 

We are testing QSPI NAND FLASH memory with AM6254 CPU but are not successful for memory detection. Please see below images for the interfacing.

QSPI FLASH PART#  - W25N02JWTBIF

Please see below for the Device tree implementation.

&ospi0 {
spi-nand@0 {
compatible = "winbond,W25n02jw";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <25000000>;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bbt-options = "pagewise";
nand-on-flash-bbt;
nand-oob-size = <64>;
nand-page-size = <2048>;
nand-pages-per-block = <64>;
nand-block-size = <131072>;
nand-num-chips = <1>;
ti,spi-num-cs = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "ospi.tiboot3";
reg = <0x0 0x80000>;
};

partition@80000 {
label = "ospi.tispl";
reg = <0x80000 0x200000>;
};

partition@280000 {
label = "ospi.u-boot";
reg = <0x280000 0x400000>;
};

partition@680000 {
label = "ospi.env";
reg = <0x680000 0x40000>;
};

};
};
};


&ospi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
};

ospi0_pins_default: ospi0-pins-default {
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
                        AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
                        AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
                        AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
                        AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3*/
>;
        };

[ 1.127635] cadence-qspi fc40000.spi: registered master spi0
[ 1.127673] spi spi0.0: setup mode 0, 8 bits/w, 25000000 Hz max --> 0
[ 1.528003] spi-nand: probe of spi0.0 failed with error -110
[ 1.533695] cadence-qspi fc40000.spi: registered child spi0.0

Request you to suggest us debugging steps/if any corrections needed for the resolution.

Thanks,

Brijesh K

  • 0
    TI__Guru 62857 points

    Hi,

    have you tried looking at the bus signals using a logic analyzer to see if there are any clues?

    Regards, Andreas

  • 0 in reply to Andreas Dannenberg
    Prodigy 70 points

    Hi Andreas,

    Thank you so much for your response.

    I have tried to capture CLK & DQ0  signals in our custom board with W25N02JWTBIF and here I have attached Images for them (Could not see any transactions on DQ1, DQ2 & DQ3). Timing and voltage level wise signal seems OK.

     -> Parallelly we have also tried to test OSPI flash memory of the EVK (PROC114E3) as a QSPI by doing suggested hardware and software modifications but we are not able to detect memory as a QSPI and it works fine as a OSPI.

    We have followed suggestions for the software as per mentioned in below link but it is not working.

    3.2.2.10. OSPI/QSPI — Processor SDK AM62x Documentation

    &ospi0 {
            flash@0 {
                    compatible = "spansion,s28hs512t","jedec,spi-nor";
                    reg = <0x0>;
                    spi-tx-bus-width = <1>;
                    spi-rx-bus-width = <4>;
                    spi-max-frequency = <25000000>;
                    cdns,tshsl-ns = <60>;
                    cdns,tsd2d-ns = <60>;
                    cdns,tchsh-ns = <60>;
                    cdns,tslch-ns = <60>;
                    cdns,read-delay = <4>;
                    cdns,phy-mode;

     

                    partitions {
                            compatible = "fixed-partitions";
                            #address-cells = <1>;
                            #size-cells = <1>;

     

                            partition@0 {
                                    label = "ospi.tiboot3";
                                    reg = <0x0 0x80000>;
                            };

     

                            partition@80000 {
                                    label = "ospi.tispl";
                                    reg = <0x80000 0x200000>;
                            };

     

                            partition@280000 {
                                    label = "ospi.u-boot";
                                    reg = <0x280000 0x400000>;
                            };

     

                            partition@680000 {
                                    label = "ospi.env";
                                    reg = <0x680000 0x40000>;
                            };

                            partition@6c0000 {
                                    label = "ospi.env.backup";
                                    reg = <0x6c0000 0x40000>;
                            };

     

                            partition@800000 {
                                    label = "ospi.rootfs";
                                    reg = <0x800000 0x37c0000>;
                            };

     

                            partition@3fc0000 {
                                    label = "ospi.phypattern";
                                    reg = <0x3fc0000 0x40000>;
                            };
                    };
            };
    };

    Error:

    [    1.133941] spi spi0.0: setup: ignoring unsupported mode bits 200
    [    1.140344] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff

    Please suggest your precious thoughts and ways to resolve the issue.

    Thanks,

    Brijesh K

  • 0 in reply to brijesh kathavadia
    TI__Guru 62857 points

    Let me find some time to look into this more closely, it may take me a couple of days.

    Regards, Anderas

  • 0 in reply to Andreas Dannenberg
    Prodigy 70 points

    Dear Andreas,

    Sure, please take your time  and we shall wait for your response.

    one request to consider this on priority please as we are having issue since a week and we have to resolve it now.

    Thanks,

    Brijesh K

  • 0 in reply to brijesh kathavadia
    TI__Guru 62857 points

    Understood.

    Regards, Andreas

  • 0 in reply to Andreas Dannenberg
    Prodigy 70 points

    Dear Andreas,

    Waiting for your response please request you to solve this issue urgently.

    Thanks,

    Brijesh K

  • 0 in reply to brijesh kathavadia
    TI__Guru 62857 points

    Hi!

    I'll look at this first thing tomorrow Thursday. Apologies for the delay, there were some other high-priority items that needed to be taken care off first.

    Regards, Andreas

  • 0 in reply to Andreas Dannenberg
    Prodigy 70 points

    Hi Andreas,

    It is OK no problem.

    Will wait for your response.

    Thanks,

    Brijesh K

  • 0 in reply to brijesh kathavadia
    TI__Guru 62857 points

    Hi Brijesh,

    from your schematic and device tree extract it looks like you didn't connect the chip select signal??

    From your Flash memory device datasheet (I found one at https://www.winbond.com/resource-files/W25N01JWxxxGT_RevC_210524.pdf)...

    Usually connecting/controlling CS is a mandatory signal for many/most SPI devices, and it also often provides a mean for starting/recognizing a new "clean" command sequence. Hence it's always shown in all timing diagrams.

    From a software POV, you can see an example below of one of our K3 devices that uses the same OSPI controller as AM62x is using but only uses/configures it in QSPI mode on the EVM is configured (ospi1 refers to the second OSPI peripheral of that device, ospi0 is used/connected in 8-bit mode so we ignored that for the purposes of this thread here):

    ospi1 pin definitions for QSPI mode:
    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts?h=ti-linux-5.10.y#n319

    ospi1 flash device definitions for QSPI mode:
    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts?h=ti-linux-5.10.y#n559

    I suggest you try out the above concept on an AM62-SK board to verify the general operation is good, and then apply this to your own board, while connecting the CS signal.

    Regards, Andreas

  • 0 in reply to Andreas Dannenberg
    Prodigy 70 points

    Dear Andreas,

    Thank you so much for pointing out CS signal connectivity issue in our board.

    As per your suggestions of the above links we have tried out to test QSPI on AM62-SK board (EVM) E1 but still getting below issues.

    [    0.000000] GICv3: 256 SPIs implemented
    [    0.000000] GICv3: 0 Extended SPIs implemented
    [    1.133157] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
    [    1.140071] spi-nor: probe of spi0.0 failed with error -2

    Please see below images for the DTS changes we made for AM62-SK board (EVM).

    We shall test QSPI in our own board once issue is resolved on AM62-SK board.

    Thanks,

    Brijesh K

  • 0 in reply to brijesh kathavadia
    TI__Guru 62857 points

    Hi Brijesh,

    I've actually demonstrated this to work on my own AM62-SK board (Rev E2) and documented here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1206334/am625-ospi-flash-memory-of-the-evk-proc114e3-as-a-qspi-not-working/4563734#4563734

    Can you please try those exact changes. If this still doesn't work we may need to look into Rev E1 vs. Rev E2 board differences.

    Regards, ANdreas